<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>NRF52840 Lan8651</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/116204/nrf52840-lan8651</link><description>Hello , I &amp;#39;m trying to use the Lan865x (two -wire eth click ) chip with the nrf52840dk board , using zephyr 3 . 7 . I &amp;#39;m getting always this error while trying a net sample code : &amp;lt;err &amp;gt; oa _tc6 : Header transmission error ! &amp;lt;err &amp;gt; eth _lan865x : SPI</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 15 Apr 2026 09:13:48 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/116204/nrf52840-lan8651" /><item><title>RE: NRF52840 Lan8651</title><link>https://devzone.nordicsemi.com/thread/564970?ContentTypeID=1</link><pubDate>Wed, 15 Apr 2026 09:13:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:243767ba-9e2e-415f-8e06-7c4cfafc3c90</guid><dc:creator>Xenia Morera</dc:creator><description>&lt;p&gt;Hi, I&amp;acute;m experiencing the same error with this LAN in Zephyr, did you end up finding what was wrong? I also get this&amp;nbsp;&lt;span&gt;Header transmission error. Thanks&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF52840 Lan8651</title><link>https://devzone.nordicsemi.com/thread/514980?ContentTypeID=1</link><pubDate>Sat, 14 Dec 2024 06:44:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:24095160-6502-44fa-b011-4e6bdc31238a</guid><dc:creator>David Lacken</dc:creator><description>&lt;p&gt;Have you verified the configuration settings for the SPI communication on both the Nordic board and the LAN865x, and are there any specific parameters (like clock polarity and phase) that need to be matched between the two devices?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF52840 Lan8651</title><link>https://devzone.nordicsemi.com/thread/510333?ContentTypeID=1</link><pubDate>Wed, 13 Nov 2024 14:45:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8b4ea420-cd75-4bc4-b2b0-823b65d726a2</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;arduino_spi by default points to SPI3, and if you have kept that it means you have SCK on P1.15, MISO on P1.14 and MOSI on P1.13, which should be good (there are LEDs there as well on the DK so perhaps the signal integrity is not as good as it could have mbeen, but if it looks good on an oscillioscope plot that should be good.&lt;/p&gt;
[quote user=""]I can see that the clock and the MOSI are working with the osciloscope but no data from the LAN865x to the nordic board[/quote]
&lt;p&gt;Can you compare the data sent from the nRF and when you use an RPi? What is the difference in the data sent to the&amp;nbsp;Lan865x? Perhaps that will hint to some configuration issues.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF52840 Lan8651</title><link>https://devzone.nordicsemi.com/thread/509683?ContentTypeID=1</link><pubDate>Fri, 08 Nov 2024 13:22:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:485e18b0-3358-4a3f-83d5-195c7a8c69be</guid><dc:creator>karenn</dc:creator><description>&lt;p&gt;Hi Einar&lt;/p&gt;
&lt;p&gt;Here the DT that I&amp;#39;ve used :&amp;nbsp;&lt;pre class="ui-code" data-mode="text"&gt;
&amp;amp;arduino_spi {

    status = &amp;quot;okay&amp;quot;;
    lan865x: lan865x@0 {
		status = &amp;quot;okay&amp;quot;;
		compatible = &amp;quot;microchip,lan865x&amp;quot;;
		spi-max-frequency = &amp;lt;20000000&amp;gt;;
		local-mac-address = [00 19 05 00 00 04];
		reg = &amp;lt;0&amp;gt;;
		rst-gpios = &amp;lt;&amp;amp;gpio0 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&amp;gt;;
	        int-gpios = &amp;lt;&amp;amp;gpio0 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)&amp;gt;;
	        plca-enable;
                plca-node-id = &amp;lt;3&amp;gt;;
                plca-node-count = &amp;lt;8&amp;gt;;
                plca-burst-count = &amp;lt;0x0&amp;gt;;
                plca-burst-timer = &amp;lt;0x80&amp;gt;;
                plca-to-timer = &amp;lt;0x20&amp;gt;;

  };
};

&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;for the pinctl in the dtsi file :&amp;nbsp;&lt;pre class="ui-code" data-mode="text"&gt;/*
 * Copyright (c) 2022 Nordic Semiconductor
 * SPDX-License-Identifier: Apache-2.0
 */

&amp;amp;pinctrl {
	uart0_default: uart0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 6)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RTS, 0, 5)&amp;gt;;
		};
		group2 {
			psels = &amp;lt;NRF_PSEL(UART_RX, 0, 8)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_CTS, 0, 7)&amp;gt;;
			bias-pull-up;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 0, 6)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RX, 0, 8)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RTS, 0, 5)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_CTS, 0, 7)&amp;gt;;
			low-power-enable;
		};
	};

	uart1_default: uart1_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_RX, 1, 1)&amp;gt;;
			bias-pull-up;
		};
		group2 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 1, 2)&amp;gt;;
		};
	};

	uart1_sleep: uart1_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_RX, 1, 1)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_TX, 1, 2)&amp;gt;;
			low-power-enable;
		};
	};

	i2c0_default: i2c0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(TWIM_SDA, 0, 26)&amp;gt;,
				&amp;lt;NRF_PSEL(TWIM_SCL, 0, 27)&amp;gt;;
		};
	};

	i2c0_sleep: i2c0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(TWIM_SDA, 0, 26)&amp;gt;,
				&amp;lt;NRF_PSEL(TWIM_SCL, 0, 27)&amp;gt;;
			low-power-enable;
		};
	};

	i2c1_default: i2c1_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(TWIM_SDA, 0, 30)&amp;gt;,
				&amp;lt;NRF_PSEL(TWIM_SCL, 0, 31)&amp;gt;;
		};
	};

	i2c1_sleep: i2c1_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(TWIM_SDA, 0, 30)&amp;gt;,
				&amp;lt;NRF_PSEL(TWIM_SCL, 0, 31)&amp;gt;;
			low-power-enable;
		};
	};

	pwm0_default: pwm0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(PWM_OUT0, 0, 13)&amp;gt;;
			nordic,invert;
		};
	};

	pwm0_sleep: pwm0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(PWM_OUT0, 0, 13)&amp;gt;;
			low-power-enable;
		};
	};

	spi0_default: spi0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(SPIM_SCK, 0, 27)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MOSI, 0, 26)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MISO, 0, 29)&amp;gt;;
		};
	};

	spi0_sleep: spi0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(SPIM_SCK, 0, 27)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MOSI, 0, 26)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MISO, 0, 29)&amp;gt;;
			low-power-enable;
		};
	};

	spi1_default: spi1_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(SPIM_SCK, 0, 31)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MOSI, 0, 30)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MISO, 1, 8)&amp;gt;;
		};
	};

	spi1_sleep: spi1_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(SPIM_SCK, 0, 31)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MOSI, 0, 30)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MISO, 1, 8)&amp;gt;;
			low-power-enable;
		};
	};

	spi2_default: spi2_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(SPIM_SCK, 0, 19)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MOSI, 0, 20)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MISO, 0, 21)&amp;gt;;
		};
	};

	spi2_sleep: spi2_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(SPIM_SCK, 0, 19)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MOSI, 0, 20)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MISO, 0, 21)&amp;gt;;
			low-power-enable;
		};
	};

	qspi_default: qspi_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(QSPI_SCK, 0, 19)&amp;gt;,
				&amp;lt;NRF_PSEL(QSPI_IO0, 0, 20)&amp;gt;,
				&amp;lt;NRF_PSEL(QSPI_IO1, 0, 21)&amp;gt;,
				&amp;lt;NRF_PSEL(QSPI_IO2, 0, 22)&amp;gt;,
				&amp;lt;NRF_PSEL(QSPI_IO3, 0, 23)&amp;gt;,
				&amp;lt;NRF_PSEL(QSPI_CSN, 0, 17)&amp;gt;;
			nordic,drive-mode = &amp;lt;NRF_DRIVE_H0H1&amp;gt;;
		};
	};

	qspi_sleep: qspi_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(QSPI_SCK, 0, 19)&amp;gt;,
				&amp;lt;NRF_PSEL(QSPI_IO0, 0, 20)&amp;gt;,
				&amp;lt;NRF_PSEL(QSPI_IO1, 0, 21)&amp;gt;,
				&amp;lt;NRF_PSEL(QSPI_IO2, 0, 22)&amp;gt;,
				&amp;lt;NRF_PSEL(QSPI_IO3, 0, 23)&amp;gt;;
			low-power-enable;
		};
		group2 {
			psels = &amp;lt;NRF_PSEL(QSPI_CSN, 0, 17)&amp;gt;;
			low-power-enable;
			bias-pull-up;
		};
	};

	spi3_default: spi3_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(SPIM_SCK, 1, 15)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MISO, 1, 14)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MOSI, 1, 13)&amp;gt;;
		};
	};

	spi3_sleep: spi3_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(SPIM_SCK, 1, 15)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MISO, 1, 14)&amp;gt;,
				&amp;lt;NRF_PSEL(SPIM_MOSI, 1, 13)&amp;gt;;
			low-power-enable;
		};
	};

};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;and for the lan8651 I&amp;#39;m using this evaluation board which I have tested with a Raspberry pi and it works fine :&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://www.mikroe.com/two-wire-eth-click?srsltid=AfmBOoq4voSZdUgfa4Wwms7uturBa8gQrzeUtw5B4xtBP4m3zquLWpQm"&gt;https://www.mikroe.com/two-wire-eth-click?srsltid=AfmBOoq4voSZdUgfa4Wwms7uturBa8gQrzeUtw5B4xtBP4m3zquLWpQm&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Thanks,&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF52840 Lan8651</title><link>https://devzone.nordicsemi.com/thread/509680?ContentTypeID=1</link><pubDate>Fri, 08 Nov 2024 13:00:06 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9dc1fb5c-c7f8-407d-88c8-f48b1ef768de</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I don&amp;#39;t have experience with&amp;nbsp;Lan865x but I expect it should be possible to get it to work. Can you share the device treein a more readable way (you can add code blocks using Inster -&amp;gt; Code). Please add also add the pinctrl configuration where you set the SPI pins?&amp;nbsp;It could also be intersting to see the plot from the oscilliscope/logic analyzer.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>