RE: Removing noises from ADC reading through SPI

grabro — Wed, 11 Dec 2024 23:11:07 GMT

Hi hmolesworth,

Thanks for the quick reply. In our current design, we do have a separate regulator to supply to the external ADC module. But I will try the separate power source for the ADC with a separate coin cell battery and see how it goes.

Meanwhile, it would be great to find out whether such timeslot method would be suffice to tackle the BLE noise or not.

Many thanks!

RE: Removing noises from ADC reading through SPI

hmolesworth — Wed, 11 Dec 2024 21:12:48 GMT

Timing apart, noise is mostly coupled to the external ADC via VDD, both as a voltage dip and high-frequency noise both of which which will alias into ADC sample data even if the ADC has a high CMRR. The trick is to use separate reservoir capacitances for nRF and ADC which cannot back-drive (pull down) the other; this can be done using a separate regulator to the ADC, or a simple ideal diode (MAX40203) to the ADC to allow the nRF VDD to droop on BLE transmission without affecting the ADC VDD supply which will hold up by the local ADC bulk capacitance. A quick sanity test would be to supply the ADC with a separate coin cell battery with only a common GND but no common VDD. Should most of the noise disappear then that would indicate VDD coupling indeed be the primary culprit, and simple circuits exist to handle that. This is a frequent issue with low-level biological signals.