nRF54L15 Rev 1 Errata v0.8

RE: nRF54L15 Rev 1 Errata v0.8

Einar Thorsrud — Fri, 31 Jan 2025 10:24:35 GMT

That probably differ between modules, so I suggest you ask the module manufacturer (U-Blox in this case) which package variant is used on which modules if they have not documented it.

Yes, P1.11 and P1.12 are clock pins.

RE: nRF54L15 Rev 1 Errata v0.8

Ingfu — Fri, 31 Jan 2025 10:05:07 GMT

Do modules like the u-blox B206 use the CSP or QFN package? Affected pins P1.11 and P1.12 are also clock pins, right?

RE: nRF54L15 Rev 1 Errata v0.8

Einar Thorsrud — Fri, 31 Jan 2025 09:51:43 GMT

Hi,

The errata workaround text describe the conditions where you can use the pins safely (include series resistor, short PCB tracks, and lower than 1 MHz toggling speed).

Please note that this only affect the CSP package variant, so if not using the CSP, it is not relevant (I am stressing it again as most designs will not use the CSP and tehrefore not be affected).

RE: nRF54L15 Rev 1 Errata v0.8

Ingfu — Fri, 31 Jan 2025 09:39:51 GMT

Hi,

I just stumbled on the errata [33]. This is quite a huge error and should be highlighted as it might reduce the number of GPIOs significantly. Could you elaborate on the circumstances under which it is safe to use the concerned pins? I really don't want to take the risk of failing radiated tests. Will modules also be affected?

RE: nRF54L15 Rev 1 Errata v0.8

dav01 — Sat, 25 Jan 2025 12:26:38 GMT

thx

RE: nRF54L15 Rev 1 Errata v0.8

Einar Thorsrud — Thu, 23 Jan 2025 12:37:19 GMT

Hi,

I cannot comment on potential future product updates, so I ask that you contact your regional Nordic sales representative regarding that.

However, please note that erratum 33 only applies to the CSP version of the device (CAAA-B00).

Regarding 37, I wonder what you mean by software not having time to perform the workaround? If not using system off, you can apply the workaround at any time (though current consumption is increased until you do). If using system off (which most applications do not), you need to ensure that 40 cycles pass before entering system off mode (as you do this in startup, that in practice1 means to ensure at least a small time between startup and entering system OFF mode.