SPIS00 configuration issue on nRF54L15

RE: SPIS00 configuration issue on nRF54L15

Kenneth — Mon, 16 Jun 2025 12:07:12 GMT

Hi,

The two sources for information here is:
https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/spis.html#d1474e788

And:
https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/chapters/pin.html#ariaid-title2

But if using port2 be aware of (if you don't do this, it won't work):
https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/chapters/pin.html#d383e188

Kenneth

RE: SPIS00 configuration issue on nRF54L15

Anders Esbensen — Tue, 20 May 2025 12:33:22 GMT

Was this ever clarified ?

I am experiencing the exact same issue with SPIS00 using this following pin setup

&pinctrl {

spis00_default: spis00_default {

group1 {

psels = <NRF_PSEL(SPIS_SCK, 2, 1)>,

<NRF_PSEL(SPIS_MISO, 2, 2)>,

<NRF_PSEL(SPIS_MOSI, 2, 4)>,

<NRF_PSEL(SPIS_CSN, 2, 5)>;

};

spis00_sleep: spis00_sleep {

group1 {

psels = <NRF_PSEL(SPIS_SCK, 2, 1)>,

<NRF_PSEL(SPIS_MISO, 2, 2)>,

<NRF_PSEL(SPIS_MOSI, 2, 4)>,

<NRF_PSEL(SPIS_CSN, 2, 5)>;

low-power-enable;

};

};

However with the following pin still on p2 it seems to work

&pinctrl {

spis00_default: spis00_default {

group1 {

psels = <NRF_PSEL(SPIS_SCK, 2, 6)>,

<NRF_PSEL(SPIS_MOSI, 2, 9)>,

<NRF_PSEL(SPIS_MISO, 2, 8)>,

<NRF_PSEL(SPIS_CSN, 2, 10)>;

};

spis00_sleep: spis00_sleep {

group1 {

psels = <NRF_PSEL(SPIS_SCK, 2, 6)>,

<NRF_PSEL(SPIS_MOSI, 2, 9)>,

<NRF_PSEL(SPIS_MISO, 2, 8)>,

<NRF_PSEL(SPIS_CSN, 2, 10)>;

low-power-enable;

};

Best regards

Anders

RE: SPIS00 configuration issue on nRF54L15

Gregory C — Thu, 30 Jan 2025 15:46:17 GMT

Hello,

OK. It seems that this test app is using the Zephyr SPI library rather than the Nordic one. Maybe the SPI peripheral initialization is slightly different an can explain why I am facing this issue ?

In parallel I continued my investigations with the Nordic nrfx_spis library and I tried to use this time SPIS21 instance on GPIO port P1, then on GPIO port P2 (using the dedicated pins). Both configurations work like a charm. It seems the problem only appears on SPIS00 instance.

To conclude, I will certainly reassign the SPI slave pins on my board to target a different SPIS instance I am sure it works with Nordic library, or I will keep the same pins and switch to the Zephyr SPI library.

Thanks for your support...

RE: SPIS00 configuration issue on nRF54L15

Kenneth — Thu, 30 Jan 2025 13:42:21 GMT

Hello,

I updated the \v2.9.0\zephyr\tests\drivers\spi\spi_controller_peripheral\ example to use spi00 with the specified gpios, and it seems to work here. Attaching relevant files. Hope it can be of use.

Kenneth

devzone.nordicsemi.com/.../0385.nrf54l15dk_5F00_nrf54l15_5F00_cpuapp.overlay

RE: SPIS00 configuration issue on nRF54L15

Gregory C — Thu, 30 Jan 2025 10:47:53 GMT

Hi,

I understand your point of view but it sounds quite strange the same code perfectly works for the SPIS30 instance and not for the SPIS00 !!!

Anyway, I changed the ORC value to 0xAA in my example and I added the following lines before initializing the SPIS driver :

// Initialize the POWER module

nrfx_power_config_t power_config = {0};

status = nrfx_power_init(&power_config);

NRFX_ASSERT(status == NRFX_SUCCESS);

// Request constant latency mode

status = nrfx_power_constlat_mode_request();

NRFX_ASSERT(status == NRFX_SUCCESS);

I also enabled the nrfx POWER driver in the prj.conf

CONFIG_NRFX_POWER=y

But I am facing the same troubles with ORC bytes transmitted on SDO line :

Could it be a problem related to the DMA init or transfer on SPIS00 instance ?

RE: SPIS00 configuration issue on nRF54L15

Kenneth — Thu, 30 Jan 2025 08:39:14 GMT

Hi,

Reading the hardware description for the SPIS I get the sense it's related to RELEASE is not done, see Figure 2:
https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/spis.html

Can you set different value for DEF and ORC to confirm if that is the case?

Also, I assume nrfx_spis_buffers_set() is called before CSN go low.

Edit: If nothing still doesn't work, try to see if enabling constlat make any difference, ref:
#include <nrfx_power.h>
nrfx_power_constlat_mode_request();

Kenneth

RE: SPIS00 configuration issue on nRF54L15

Gregory C — Wed, 29 Jan 2025 15:19:01 GMT

Hi Kenneth,

Thank you so much for these hints. We are progressing... Indeed, when I select the specific pins specified in the "Pin assignments" chapter of the datasheet I can see an activity on the SPI slave interface.

By the way, there are some mismatches in the datasheet Nordic should fix : The SPIS Peripheral - Configuration chapter specifies that SPIS00 instance can be mapped on GPIO port P2 without indicating that specific pins have to be used (at the opposite of SPIS20/21/22 instances).

Unfortunately, I am now facing another issue : as you can see on the new SPI communication trace, the SPIS peripheral only transmits ORC bytes, not the Tx buffer content. Furthermore, the NRFX_SPIS_XFER_DONE event is never triggered by the library. It looks like nrfx_spis_buffers_set command doesn't configure correctly the SPI transaction even if the returned status is NRFX_SUCCESS.

Do you have an idea what's going wrong ?

RE: SPIS00 configuration issue on nRF54L15

Kenneth — Wed, 29 Jan 2025 13:47:43 GMT

Looking at the pin assignments information I can find there are very specific pins on Port2 that can be used by SPIS00/20, ref:
https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/chapters/pin.html

Can you make sure to use those?

It doesn't seem as there any specific requirement for which pin that can be used as CSN though.

Kenneth