GPIO Digital Input nRF9151

RE: GPIO Digital Input nRF9151

Sage_Duggal — Mon, 10 Feb 2025 13:40:54 GMT

Any chance any one knows the input resistance of a digital input pin for the nRF9151? I'm guessing it's on the order of MOhms, but would like more information if it's available.

RE: GPIO Digital Input nRF9151

Sage_Duggal — Sun, 02 Feb 2025 22:23:19 GMT

Thank you for the information and the resource, that makes sense. From the TI document, it sounds like all of these issues crop up if the input is left floating, which is not my situation.

In my use case, the GPIO input will always be driven to ~VDD, so it sounds like I won't run into any issue.

I would still be curious if someone from Nordic takes a look into this on Monday.

RE: GPIO Digital Input nRF9151

hmolesworth — Sat, 01 Feb 2025 22:13:09 GMT

The guidance is vague, and technically correct but misleading. The note refers to the vanishingly-small voltage window typically near VDD/2 where both input FETs on an input pin are slightly turned on leading to a phenomenon known as Feedthrough (or Delta ICC) where perhaps 100uA or so can be seen flowing through the input FETs between the internal VDD and internal Gnd rails. Finding this transition and demonstrating the effect is hard; with 100,000 devices in the field each with an input pin that is allowed to float of course will guarantee a problem with batteries not lasting as long as expected.

Driving an input pin to the usual high and low levels close to VDD or close to Gnd will never exhibit this effect. Here is a more detailed description, as this affects all devices not just Nordic (first noted in the early 1980s by Phillips on their 8051):

Implications of Slow or Floating CMOS Inputs scba004e