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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>PPI / GPIOTE clock query</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/118969/ppi-gpiote-clock-query</link><description>Hi all, Relatively quick question. I have a production implementation where the COMP &amp;quot;Cross&amp;quot; event is wired by PPI to a GPIOTE &amp;quot;out&amp;quot; task. The Comp is acting as a UVLO. When the GPIOTE is set off the voltage will rise and UVLO will turn it back on again</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 18 Feb 2025 10:19:00 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/118969/ppi-gpiote-clock-query" /><item><title>RE: PPI / GPIOTE clock query</title><link>https://devzone.nordicsemi.com/thread/523455?ContentTypeID=1</link><pubDate>Tue, 18 Feb 2025 10:19:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:019de575-90e9-4843-851b-658aa6b68f5c</guid><dc:creator>snoopy20</dc:creator><description>&lt;p&gt;Hi,&lt;br /&gt;&lt;br /&gt;Yes it&amp;#39;s been confirmed by multiple customers as working perfectly. It was really to aid my understanding and perhaps will aid others if they search similar.&lt;br /&gt;&lt;br /&gt;Regards,&lt;/p&gt;
&lt;p&gt;Andrew&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PPI / GPIOTE clock query</title><link>https://devzone.nordicsemi.com/thread/523450?ContentTypeID=1</link><pubDate>Tue, 18 Feb 2025 10:12:16 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b02bc35b-00ae-4753-b3c9-7bae21753a6d</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi Andrew,&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;br /&gt;I agree that 5MHz is in the ballpark of the limit for the setup. I assume that reduce the COMP speed to low is an OK solution for you ?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PPI / GPIOTE clock query</title><link>https://devzone.nordicsemi.com/thread/523327?ContentTypeID=1</link><pubDate>Mon, 17 Feb 2025 14:52:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4cbe9d3e-3712-427b-abf1-6b1429acbaeb</guid><dc:creator>snoopy20</dc:creator><description>&lt;p&gt;Hi,&lt;br /&gt;&lt;br /&gt;I&amp;#39;m already running TASKS_CONSTLAT = 1;&lt;/p&gt;
&lt;p&gt;I&amp;#39;m not using GPIOTE IN event for this part of the system (though it is in use elsewhere, but I assume doesn&amp;#39;t effect the output of a GPIOTE channel).&lt;br /&gt;&lt;br /&gt;So if PPI takes 1 cycle and GPIOTE takes 2 cycles @ 16MHz that&amp;#39;s 16/3 = 5.3MHz&lt;br /&gt;&lt;br /&gt;Which is close to the 5MHz &amp;quot;normal&amp;quot; mode of the COMP. Given that the behaviour is random sometimes taking minutes and sometimes hours I think there&amp;#39;s another cycle being taken somewhere. Or maybe the 5MHz for the COMP is a ballpark figure not an absolute. It&amp;#39;s a little close for comfort so I think the reason is potentially established.&lt;br /&gt;&lt;br /&gt;Regards,&lt;br /&gt;&lt;br /&gt;Andrew&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PPI / GPIOTE clock query</title><link>https://devzone.nordicsemi.com/thread/523317?ContentTypeID=1</link><pubDate>Mon, 17 Feb 2025 14:41:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b1fbbe85-bf2d-430f-bf55-215c7b953764</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi Andrew,&lt;/p&gt;
&lt;p&gt;You can take a look at the Clock Control section in the spec:&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1739802643160v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;The HFCLK clock control receive the oscillation either from the external 32MHz crystal or the internal HFINT. It then output the PCLK16 16 Mhz to the peripherals.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;You can choose to start the HFXO or leave it to the HFINT (default)&amp;nbsp;&lt;/p&gt;
&lt;p&gt;When there is a peripheral that requires PCLK16 then the HFCLK will be kept active.&amp;nbsp;&lt;/p&gt;
[quote user="snoopy20"]How about the GPIOTE, how fast does it react to the PPI event?[/quote]
&lt;p&gt;Actually it may take up to 2 cycles for the GPIOTE task to output on GPIO pin.&amp;nbsp;&lt;br /&gt;You can take a look at this ticket:&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/102662/gpiote-event---ppi---gpiote-task-latency"&gt;gpiote event -&amp;gt; ppi -&amp;gt; gpiote task latency&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;and this ticket:&amp;nbsp;&lt;br /&gt;&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/19258/delay-from-gpiote-event-until-a-task-is-started-over-ppi-on-nrf52"&gt;Delay from GPIOTE Event until a Task is started over PPi on nRF52&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Seems that the latency needed is about 380ns (from GPIOTE IN event to GPIO output)&amp;nbsp;&lt;/p&gt;
&lt;p&gt;You can try to set&amp;nbsp;&lt;span&gt;NRF_POWER-&amp;gt;TASKS_CONSTLAT = 1; to switch to constant latency mode, but I don&amp;#39;t think it would reduce the latency in your case, as the COMP should keep the HFCLK running all the time.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PPI / GPIOTE clock query</title><link>https://devzone.nordicsemi.com/thread/523291?ContentTypeID=1</link><pubDate>Mon, 17 Feb 2025 13:48:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:01daaa76-78ab-4721-b804-2352b183d4d3</guid><dc:creator>snoopy20</dc:creator><description>&lt;p&gt;Hi Hung,&lt;br /&gt;&lt;br /&gt;How is the 16MHz clock generated, half the 32MHz clock (so RC or crystal), and forced always on so long as PPI is enabled? &lt;br /&gt;&lt;br /&gt;How about the GPIOTE, how fast does it react to the PPI event?&lt;br /&gt;&lt;br /&gt;The issue isn&amp;#39;t that it&amp;#39;s not detecting the recovery (which at COMP &amp;#39;slow mode&amp;#39; 1.5MHz works just fine), it&amp;#39;s that in &amp;#39;normal&amp;#39; 5MHz mode then either/and PPI or GPIOTE can&amp;#39;t keep up. &lt;br /&gt;&lt;br /&gt;The 16MHz clock suggests it should, given 1/5MHz is plenty of tolerance.&lt;br /&gt;&lt;br /&gt;Regards,&lt;br /&gt;&lt;br /&gt;Andrew&lt;/p&gt;
&lt;p&gt;###&lt;br /&gt;&lt;br /&gt;Flow is:&lt;br /&gt;&lt;br /&gt;COMP(UVLO) -&amp;gt; PPI -&amp;gt; GPIOTE -&amp;gt; [Toggle] -&amp;gt; LED_PWM_DRIVER&lt;br /&gt;&lt;br /&gt;Where COMP is measuring the voltage going to the LED_PWM_DRIVER. LED_PWM_DRIVER will be very fast turn-off but very slow turn-on (slow current ramp on turn-on).&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: PPI / GPIOTE clock query</title><link>https://devzone.nordicsemi.com/thread/523282?ContentTypeID=1</link><pubDate>Mon, 17 Feb 2025 13:30:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a1c9272c-9471-4e60-8d59-35f11e4b43fc</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi Andrew,&amp;nbsp;&lt;br /&gt;Could you let me know the frequency of your input signal ?&amp;nbsp;&lt;br /&gt;You can read more about the clock that the PPI align to:&amp;nbsp;&lt;br /&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1739798813337v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1739798849509v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;So there can be up to one clock cycle delay.&lt;br /&gt;&lt;br /&gt;I don&amp;#39;t fully understand your setup, can you show it with a schematic or a figure explaining how it work ?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>