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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/119703/issue-with-qspi-flash-mx25r64-on-custom-pin-configuration-nrf52840</link><description>Hello, 
 I am experiencing an issue while trying to connect an external flash memory (MX25R64) via the QSPI interface on an nRF52840-based custom board. My pin configuration differs from the one used in the official development kit. 
 
 Here is my pin</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 08 May 2025 06:09:40 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/119703/issue-with-qspi-flash-mx25r64-on-custom-pin-configuration-nrf52840" /><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/534377?ContentTypeID=1</link><pubDate>Thu, 08 May 2025 06:09:40 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c25ddaf7-d919-48b6-9b71-4beea7d333f5</guid><dc:creator>Menon</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Apologies for the delayed response. I was on vacation and have just returned to work.&lt;/p&gt;
&lt;p&gt;Glad to hear you got it working in SPI mode!&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
[quote user="Ivenhor"]&lt;span&gt;My current hypothesis is that the issue may be related to how the QSPI peripheral maps its IO lines across Port 0 and Port 1. In our current hardware design, the flash lines are distributed across both ports&lt;/span&gt;.[/quote]
&lt;p&gt;As long as the pin configuration is valid and matches the hardware setup, assigning the I/O lines across both ports shouldn’t be an issue. I recommend probing the QSPI lines with a logic analyzer or oscilloscope to check the signals.&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;br /&gt; Abhijith&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/533770?ContentTypeID=1</link><pubDate>Fri, 02 May 2025 14:23:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5d319ef4-16c1-4dc2-a11e-2481cf211c2b</guid><dc:creator>Ivenhor</dc:creator><description>&lt;p&gt;We came back to this problem. We managed to connect an external flash in SPI mode.&lt;br /&gt;&lt;span&gt;My current hypothesis is that the issue may be related to how the QSPI peripheral maps its IO lines across Port 0 and Port 1. In our current hardware design, the flash lines are distributed across both ports&lt;/span&gt;.&lt;br /&gt;Could this be the cause of the problem?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/529815?ContentTypeID=1</link><pubDate>Mon, 31 Mar 2025 13:17:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d7ecca8e-f755-4baf-90cc-79c3421f4150</guid><dc:creator>Menon</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Good to hear that you checked the QSPI signals. If you would like a hardware review of your custom board, I recommend opening a new (private) ticket where you can share the hardware files.&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;br /&gt; Abhijith&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/529737?ContentTypeID=1</link><pubDate>Mon, 31 Mar 2025 10:06:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d0eb1770-596b-49f4-9e0e-99e537bd1fe6</guid><dc:creator>Ivenhor</dc:creator><description>&lt;p&gt;Checked the qspi signals on the devkit. Everything works.&lt;/p&gt;
&lt;p&gt;However, on the custom board for some reason only CS works. Looks like the problem is somewhere in the hardware. Thanks for your help.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/528677?ContentTypeID=1</link><pubDate>Mon, 24 Mar 2025 15:10:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5e71b101-b31d-4514-8461-b2169bae03d9</guid><dc:creator>Menon</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;From the screenshot shared, I can see that the NFC pins have been configured correctly as GPIOs. So, if you are still seeing the error message shared in the first response, then this might not be an issue of conflicting NFC pins. I doubt if this could be a hardware issue. I recommend using a logic analyzer to see if signals are present on the QSPI lines.&lt;/p&gt;
&lt;p&gt;Kind Regards,&lt;br /&gt; Abhijith&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/528346?ContentTypeID=1</link><pubDate>Fri, 21 Mar 2025 09:09:40 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7244c3d0-ae6c-47b0-82de-709ef8a06d75</guid><dc:creator>Ivenhor</dc:creator><description>&lt;p&gt;I have prepared a project based on the spi flash example. In which I created an overlay with pinout of our board and added&lt;br /&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;&amp;amp;uicr {
    nfct-pins-as-gpios;
};&lt;/pre&gt;&lt;br /&gt;The problem is reproduced with this example. Before flashing, I executed nrfjprog --eraseall&lt;br /&gt;The state of the registers in the debugger:&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1742547028298v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;&lt;a title="Example" href="https://github.com/Ivenhor/spi_flash_custom_board"&gt;Example project&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/528170?ContentTypeID=1</link><pubDate>Thu, 20 Mar 2025 10:07:52 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:cc08e862-ce1b-4c91-aa0e-3cf97ab29761</guid><dc:creator>Menon</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Are you getting the same error as before? Please make sure your hardware connections are correct and properly. If the issue is due to an NFC pin conflict, it should be resolved by the provided solution.&lt;/p&gt;
[quote user="Ivenhor"]Debugger shows that the NRF_UICR-&amp;gt;NFCPINS register is at 0x00[/quote]
&lt;p&gt;Are you seeing this after performing an eraseall?&lt;/p&gt;
&lt;p&gt;Kind Regards,&lt;/p&gt;
&lt;p&gt;Abhijith&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/527614?ContentTypeID=1</link><pubDate>Mon, 17 Mar 2025 12:29:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:93371de9-daf0-4089-a3f8-17f977f60f4f</guid><dc:creator>Ivenhor</dc:creator><description>&lt;p&gt;Unfortunately that didn&amp;#39;t help. I performed a complete wipe and flashed with the specified configuration for device three&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/527043?ContentTypeID=1</link><pubDate>Wed, 12 Mar 2025 19:21:47 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:235e926c-2492-49cf-b13e-02c8fd8a252b</guid><dc:creator>Menon</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;The &lt;code&gt;CONFIG_NFCT_PINS_AS_GPIOS=y&lt;/code&gt; is deprecated;&lt;a href="https://docs.nordicsemi.com/bundle/ncs-2.5.2/page/kconfig/index.html#CONFIG_NFCT_PINS_AS_GPIOS"&gt; see here&lt;/a&gt;. You only need to update the DTS to configure the NFC pins. Can you try running &lt;code&gt;nrfjprog --eraseall&lt;/code&gt;, then rebuild and flash the application?&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/7633.pastedimage1741807250395v2.png" alt=" " /&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Kind Regards,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Abhijith&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/526882?ContentTypeID=1</link><pubDate>Wed, 12 Mar 2025 10:22:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:72786f16-0e64-498d-be69-2bdce6ab56f6</guid><dc:creator>Ivenhor</dc:creator><description>&lt;p&gt;We are using SDK 2.5.2 and toolchain 2.8.0&lt;br /&gt;Tried adding CONFIG_NFCT_PINS_AS_GPIOS=y to prj.conf and tried adding to devicetree:&lt;br /&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;&amp;amp;uicr {
    nfct-pins-as-gpios;
};&lt;/pre&gt;&lt;br /&gt;&amp;nbsp;Unfortunately this did not help. Debugger shows that the NRF_UICR-&amp;gt;NFCPINS register is at 0x00&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1741774903121v1.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;Any other ideas?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/526853?ContentTypeID=1</link><pubDate>Wed, 12 Mar 2025 08:05:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4c0ee12e-e912-4781-b6a7-aafdcc26fd12</guid><dc:creator>Menon</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
[quote user=""]I suspect that the issue may be related to the fact that some of the assigned pins were originally used for NFC functionality.[/quote]
&lt;p&gt;Yes, this is true. On the nRF52840, the default NFC pins are P0.09 (NFC1) and P0.10 (NFC2).&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf52840/page/keyfeatures_html5.html"&gt; See the product specification, pages 927 and 928, for pin assignments&lt;/a&gt;. These pins overlap with your QSPI IO3 (P0.09) and IO2 (P0.10). If NFC is enabled, it will conflict with QSPI. Which SDK version are you using?&lt;/p&gt;
&lt;p&gt;To configure NFC pins as GPIOs, try including:&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;uicr{

nfct-pins-as-gpios;
};&lt;/pre&gt;&lt;br /&gt;&lt;/span&gt;inside the device tree.&lt;/p&gt;
&lt;p&gt;Kind REgards,&lt;/p&gt;
&lt;p&gt;Abhijith&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Issue with QSPI Flash MX25R64 on Custom Pin Configuration (nRF52840)</title><link>https://devzone.nordicsemi.com/thread/526850?ContentTypeID=1</link><pubDate>Wed, 12 Mar 2025 07:42:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7e8699e2-a7a7-4ce2-99e0-bb351878afee</guid><dc:creator>Anthony Yuan</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;Could you try CONFIG_NFCT_PINS_AS_GPIOS=y&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>