DMA buffers switching with SPI and TIMERS via PPI

RE: DMA buffers switching with SPI and TIMERS via PPI

Susheel Nuguru — Wed, 02 Apr 2025 05:38:27 GMT

If you're already chaining with SUSPEND and RESUME and still seeing corrupted samples, then it does sound like a buffer ownership race.

Even if the time between switches is enough, it's possible that the SPI is still writing when the pointer is updated or handed off. I'd suggest making absolutely sure that:

You only update the buffer address after SPI has fully suspended.
No part of your queue processing thread (or the queue itself) touches the active buffer before the handoff is done.
Also worth checking if the DMA buffers are aligned and marked as non-cached

If all that looks clean, I would next look into logging when each buffer switch and SPI transfer actually happens (timestamps) to catch any overlaps.

RE: DMA buffers switching with SPI and TIMERS via PPI

Michal Mrowiec — Fri, 28 Mar 2025 13:10:30 GMT

Yes, I tried this also. Unfortunately, the problem still persists. After switching buffers, in the interrupt handler for the sample block, the pointer to the previous part of the buffer is placed into the queue using k_msg_put. The message is then processed by the memory write thread. The number of data buffers and the time between switches are sufficient to prevent data block overlap. However, could pointer transfer errors still occur in this configuration? Where else can I look for the source of the issue?

RE: DMA buffers switching with SPI and TIMERS via PPI

Susheel Nuguru — Mon, 24 Mar 2025 12:25:09 GMT

[quote user=""]I) to switch the SPI DMA buffer address—[/quote]

I missed the obvious point, didn't I?

This is a classic race condition between DMA buffer update and the next DPPI triggered SPI transfer which normally should be solved using software enabled methods.

Maybe it helps to chain this using suspend and resume tasks

Chain Timer A → SPI.TASKS_RESUME via PPI.

After every 512 samples: Use TASKS_SUSPEND to pause SPI.Change the DMA buffer address.Then trigger TASKS_RESUME again via DPPI/PPI.

I can not think of anything else right now apart form this.

RE: DMA buffers switching with SPI and TIMERS via PPI

Michal Mrowiec — Fri, 21 Mar 2025 09:27:03 GMT

Sounds good, how can I use mutex for sampling timer (2,5 us), while it's running without irq handler?

RE: DMA buffers switching with SPI and TIMERS via PPI

Susheel Nuguru — Fri, 21 Mar 2025 09:21:41 GMT

Hi Michal,

What you are running seems a bit tight. You are running one timer that is triggering the SPI samples every 2.5us and then the other timer is slow enough to trigger only when you have 512 samples. The issue is to find a safe spot to change the buffers when the other timer is not trying to access it

I would use a mutual exclusion (mutex ) while accessing these SPI DMA buffers so that the DMA pointers are not changed while they are being used.

RE: DMA buffers switching with SPI and TIMERS via PPI

Susheel Nuguru — Thu, 20 Mar 2025 13:23:10 GMT

Michal,

I took over this thread. I want to analyze this a bit more and give you a proper reply, please expect that I will reply to you on or before Monday. Thanks for your patience in advance.

RE: DMA buffers switching with SPI and TIMERS via PPI

Michal Mrowiec — Wed, 19 Mar 2025 15:22:08 GMT

The nRF SDK version is 2.6.1.