When the clock source is LFRC then the device goes into high power state which is ~800uA

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Jared — Tue, 29 Apr 2025 12:04:51 GMT

Hi,

The trace was not uploaded properly, can you please try it again?

regards

Jared

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Gaurav — Sat, 26 Apr 2025 07:34:59 GMT

devzone.nordicsemi.com/.../Screen-Recording-2025_2D00_04_2D00_10-at-6.02.29_2F20_PM.mov

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Jared — Fri, 25 Apr 2025 10:00:24 GMT

Hi,

Please upload the trace here, we can't access external sites such as the one that you have shared.

Drag-and-drop the zip into the reply box or use insert->Image/video/file

regards

Jared

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Gaurav — Mon, 14 Apr 2025 11:42:43 GMT

Jared Anything on the above

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Gaurav — Thu, 10 Apr 2025 12:54:07 GMT

Jared Sharing you the profile of PPK for the same

[quote userid="73165" url="~/f/nordic-q-a/120462/when-the-clock-source-is-lfrc-then-the-device-goes-into-high-power-state-which-is-800ua/531293"]Do you have PPK2 that you can use to share a complete power trace with me that I can analyze? [/quote]

https://drive.google.com/file/d/1SzewOPLXNTN-MAdSXlwhM-6Sq5EOF-VZ/view?usp=drive_link

[quote userid="73165" url="~/f/nordic-q-a/120462/when-the-clock-source-is-lfrc-then-the-device-goes-into-high-power-state-which-is-800ua/531293"]Also, I don't think it's unreasonable to require a power cycle to be performed after you have flashed the nRF52840 with an external debugger. [/quote]

Issue here is I can allow one power cycle but it goes into high power state again, and we cannot do power cycle everytime it goes into high power state

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Jared — Thu, 10 Apr 2025 09:05:46 GMT

Hi Gaurav,

I still suspect that this issue is related to the chip not going into sleep mode due to debug mode. How this is correlates to your observation with LFCLK source is not clear.

Do you have PPK2 that you can use to share a complete power trace with me that I can analyze?

Are you supplying any other external circuitry trough VDD from the nRF52840?

Here is an overview over the difference between soft reset and power-on-reset:

Also, I don't think it's unreasonable to require a power cycle to be performed after you have flashed the nRF52840 with an external debugger.

regards

Jared

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Gaurav — Wed, 09 Apr 2025 04:26:53 GMT

PaKa I understand that part, after doing power cycle and without SWD interface if I push soft reset command using BLE command handler then also this state arises and gets solved again by power cycle but permanent solution is updating to a firmware which has external clock as clock ref in it.
So issue doesnt look like the debugging interface but most likely the clock is behaving erratic.

Jared No on DK I am not able to reproduce with the same configs, but on my board even with sample examples I am seeing the high dissipation state.

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

PaKa — Tue, 08 Apr 2025 13:34:02 GMT

SO after using the SWD interface for programming or/and debugging you should always power cycle the device before measuring current. This is needed as the debug interface on ARM devices can only be guaranteed to be disabled this way.

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Jared — Tue, 08 Apr 2025 13:15:33 GMT

Hi,

I tried to flash a development kit with the a BLE sample with the configs that you have shared but was not able to replicate the same result.

Can you share a hex I can flex to my devkit to try to reproduce it?

regards

Jared

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Gaurav — Mon, 07 Apr 2025 12:21:41 GMT

We have switched our clock reference to internal RC as the XTAL config was showing lot of issues on production and on field.

We have tried to replicate this issue on the board that we have made custom and have been shipping this hardware from the last 2 years and never faced this issue and since we switched to internal RC and with the config shared above we are able to replicate this on bench.

We have even tried this on sample/bluetooth/blinky and with the same clock config and that was also showing the same power drain of ~900uA.
And to fix this issue if we do Power on Reset or changing the config to XTAL, it gets fixed.
So certainly something is wrong with the clock configs where the internal RC on startup is not able to calibrate with the HFXO.
This is how the power profile looks when the high power state gets triggered-

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Jared — Mon, 07 Apr 2025 12:13:40 GMT

Hi,

It could possibly be some other reason,

[quote user="Gaurav2908"]For this to debug I have added to note down ramp up time of HFXO and this value was coming as 1uS for this scenario. [/quote]

Can you try to explain this again? I'm not sure I understand you correctly here,

Have you been able to reproduce this on a development kit and when you measure the current consumption. Can you explain where and how you measure? If you can show by sharing schematic and specify what node on the schematic you are measuring from, it would be great.

For example, maybe some external device is put into a non expected current consuming state after you reset the nRF52840 but you have to power cycle the whole board to recover it.

regards

Jared

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Gaurav — Mon, 07 Apr 2025 09:45:21 GMT

Jared Yes the debugger was connected but the behaviour is very weird here as the device stays in high power state even in pin resets state.
For this to debug I have added to note down ramp up time of HFXO and this value was coming as 1uS for this scenario. And when I DFU or flash application with XTAL configured then the issue goes away.

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Jared — Mon, 07 Apr 2025 09:12:47 GMT

Hi,

Is there a chance that the device is still in debug mode when you test this? In debug mode the device will not enter IDLE sleep but will emulate it. Debug mode is activated when the debugger is connected, and disconnecting the debugger is not enough to exit debug mode. Only a power on reset will 100% exit debug mode, although I would have expected pin reset to have similar result.

regards
Jared

RE: When the clock source is LFRC then the device goes into high power state which is ~800uA

Gaurav — Fri, 04 Apr 2025 10:43:14 GMT

This gets solved if I do power on reset or battery reconnect but not on soft resets or NVIC_systemresets