https://devzone.nordicsemi.com/f/nordic-q-a/120698/measuring-hfclk-using-lfclkOur design has an nRF5340 with a 32 MHz high frequency crystal and an accurate 32 kHz external rail to rail clock chip (+/- 5 ppm @ 25 C). We would like to measure the actual frequency of the HFXO frequency using the 32 kHz clock. I&#39;m using the followingen-USTelligent Community 13Tue, 15 Apr 2025 13:46:02 GMThttps://devzone.nordicsemi.com/thread/531860?ContentTypeID=1Tue, 15 Apr 2025 13:46:02 GMT137ad170-7792-4731-bb38-c0d22fbe4515:af316959-d9dd-4d1a-aee4-acb2ba4df323denis<p>We want to synchronize as much as possible the two clock domains. &nbsp;The LFCLK is used for the RTC. &nbsp;The HFCLK is used to generate clocks for sensors. &nbsp;The goal is to align those two so that they don&#39;t drift apart over the long term.</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/531853?ContentTypeID=1Tue, 15 Apr 2025 13:23:03 GMT137ad170-7792-4731-bb38-c0d22fbe4515:787ada0a-5236-413a-aa49-2988a9a4baf5Einar Thorsrud<p>Hi Denis,</p> <p>I do not see a fundamental problem with your approacah, as it is using digital logic and counters, which does not introduce any uncertainty. However,&nbsp;as the LFCLK and HFCLK are independent&nbsp;you have a clock crossing when you trigger PPI via the RTC. But the (average) effect of this is reduceed by increasing the time you count timer ticks, increasing the time you test could be an idea. Other than that, any additional variation should come from variations in the two oscillators.</p> <p>Out curiosity, may I ask why you are doing this?</p><div style="clear:both;"></div>