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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF54l15 TWI pin configuration</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/120725/nrf54l15-twi-pin-configuration</link><description>Hello Everyone, 
 I am using a nrf54l15 for my current project and ran into some discrepancies within the documentation provided for the processor. 
 Even the AI chat bot was confused on the issue. 
 In the TWI configuration in one location in the documentation</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 13 May 2025 13:20:10 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/120725/nrf54l15-twi-pin-configuration" /><item><title>RE: nRF54l15 TWI pin configuration</title><link>https://devzone.nordicsemi.com/thread/535144?ContentTypeID=1</link><pubDate>Tue, 13 May 2025 13:20:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3d25d900-4d9a-4cb5-8f6f-be1a0f677636</guid><dc:creator>Imanushev</dc:creator><description>&lt;p&gt;From what I understood, it is not that the pins don&amp;#39;t exist on P2, the dedicated pin they are mentioning in there is the &amp;quot;dedicated clock pins&amp;quot; on P2. The SCL needs to be a clock pin, and per the recommendation the SDA pin needs to be close to the SCL pin to avoid propagation delays.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF54l15 TWI pin configuration</title><link>https://devzone.nordicsemi.com/thread/535133?ContentTypeID=1</link><pubDate>Tue, 13 May 2025 12:56:25 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b81924a4-fbfe-436c-9cc0-029032454750</guid><dc:creator>is_qian</dc:creator><description>&lt;p&gt;Hi&amp;nbsp; S&lt;span&gt;o does this mean that p2 pins don&amp;#39;t exist here?&lt;/span&gt;&lt;br /&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1747140830124v1.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF54l15 TWI pin configuration</title><link>https://devzone.nordicsemi.com/thread/533034?ContentTypeID=1</link><pubDate>Fri, 25 Apr 2025 14:12:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d47f6500-d995-4739-a75e-f8b1da2ba73d</guid><dc:creator>Imanushev</dc:creator><description>&lt;p&gt;Great, thank you Kazi!&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best,&lt;/p&gt;
&lt;p&gt;Ivaylo&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF54l15 TWI pin configuration</title><link>https://devzone.nordicsemi.com/thread/532999?ContentTypeID=1</link><pubDate>Fri, 25 Apr 2025 11:44:30 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2cd7c656-318f-4dd1-8b23-55a88e26b956</guid><dc:creator>Kazi Afroza Sultana</dc:creator><description>&lt;p&gt;Hello Lvaylo,&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Unlike SPI and UARTE which have specific cross-domain pin assignments on P2, the documentation doesn&amp;#39;t show any dedicated cross-domain pins for TWIM on P2.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF54l15 TWI pin configuration</title><link>https://devzone.nordicsemi.com/thread/532034?ContentTypeID=1</link><pubDate>Wed, 16 Apr 2025 13:43:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b11f9dc4-03d8-43ef-bfea-95108280298a</guid><dc:creator>Imanushev</dc:creator><description>&lt;p&gt;Thank you for clearing that up Kazi.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Also since P2 has dedicated pins for SPI and UARTE, does that mean it also has dedicated pins for the TWIM or is it that any pin would work for the SDA?&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best,&lt;/p&gt;
&lt;p&gt;Ivaylo&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF54l15 TWI pin configuration</title><link>https://devzone.nordicsemi.com/thread/531974?ContentTypeID=1</link><pubDate>Wed, 16 Apr 2025 09:08:38 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2ff76612-e71f-416d-86fd-f3ec50a23d3e</guid><dc:creator>Kazi Afroza Sultana</dc:creator><description>&lt;p&gt;Hello lavylo,&lt;/p&gt;
&lt;p&gt;Thanks for pointing this out. I have talked internally. Only SCL pin needs to be connected to CLK pin.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The following information is not correct, and it will be removed on next version of documentation.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1744794440233v2.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;BR&lt;br /&gt;kazi&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>