Why ISR executing from MX25 with XiP causes issues when erase is happening but not the other threads executing from flash

RE: Why ISR executing from MX25 with XiP causes issues when erase is happening but not the other threads executing from flash

Einar Thorsrud — Thu, 24 Apr 2025 09:03:30 GMT

Hi,

Can you elaborate? Do you mean the location of a thread that is executing when the interrupt occurs, or something else?

Also, can you confirm if moving all ISRs out of the XiP region solved the issue?

RE: Why ISR executing from MX25 with XiP causes issues when erase is happening but not the other threads executing from flash

AKO — Tue, 22 Apr 2025 12:24:53 GMT

Yeah I have moved the ISRs in internal flash but why I am not seeing the same issue with threads which are executing from XiP

RE: Why ISR executing from MX25 with XiP causes issues when erase is happening but not the other threads executing from flash

Einar Thorsrud — Tue, 22 Apr 2025 12:22:56 GMT

Hi,

Do I read this correctly that you have placed the ISR on external flash? I would avoid that, and place the ISR in internal flash. That is for several good reasons, but it includes errata 43, as it is difficult to properly handle this when you have an ISR there that can be triggered at any time.