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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Unable to access the nRF54L15-DK after all-erase operation</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/121070/unable-to-access-the-nrf54l15-dk-after-all-erase-operation</link><description>Hi team, After executing RRAMC.ERASE.ERASEALL with an external debugger, I was unable to access the CPU (board) after reset. To resolve this issue, I connected the nRF-programmer and conducted an erase operation. Following this, the board appeared to</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 15 May 2025 15:03:35 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/121070/unable-to-access-the-nrf54l15-dk-after-all-erase-operation" /><item><title>RE: Unable to access the nRF54L15-DK after all-erase operation</title><link>https://devzone.nordicsemi.com/thread/535645?ContentTypeID=1</link><pubDate>Thu, 15 May 2025 15:03:35 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e920a416-9db6-4145-a460-4b9e6b23803d</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;The required sequence to allow debugging is to configure both DBGEN and SPIDEN in TAMPC from the application firmware. This is what the pre-programmed firmware does:&lt;/p&gt;
&lt;p&gt;TAMPC.PROTECT.DOMAIN[0].DBGEN.CTRL = 0x50fa00f0; // clear write protection&lt;br /&gt;TAMPC.PROTECT.DOMAIN[0].DBGEN.CTRL = 0x50fa0001; // enable signal&lt;/p&gt;
&lt;p&gt;TAMPC.PROTECT.DOMAIN[0].SPIDEN.CTRL = 0x50fa00f0; // clear write protection&lt;br /&gt;TAMPC.PROTECT.DOMAIN[0].SPIDEN.CTRL = 0x50fa0001; // enable signal&lt;/p&gt;
&lt;p&gt;It&amp;#39;s up to you why and when you choose the application to write to the above registers to allow debugging.&lt;/p&gt;
&lt;p&gt;For details also see:&lt;br /&gt;&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/tampc.html#register.PROTECT.DOMAIN.DBGEN.CTRL"&gt;https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/tampc.html#register.PROTECT.DOMAIN.DBGEN.CTRL&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Also see Figure 1. Debug and trace overview:&lt;br /&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1747318976519v3.png" alt=" " /&gt;&lt;br /&gt;&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/debug.html"&gt;https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/debug.html&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The mailbox consist of registers where the CPU and debugger exchange information. The debugger cannot instruct the device to do anything through the mailbox without a corresponding FW which acts upon data from the debugger in the mailbox.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Unable to access the nRF54L15-DK after all-erase operation</title><link>https://devzone.nordicsemi.com/thread/534525?ContentTypeID=1</link><pubDate>Thu, 08 May 2025 18:37:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:343be576-287e-45e6-81e0-6ced95e522dc</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;I will need to ask internally and get back to you.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Unable to access the nRF54L15-DK after all-erase operation</title><link>https://devzone.nordicsemi.com/thread/534378?ContentTypeID=1</link><pubDate>Thu, 08 May 2025 06:22:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e944c1a9-10ba-421b-9e75-6cc24a72f762</guid><dc:creator>KPA</dc:creator><description>&lt;p&gt;Hii,&lt;br /&gt;Could you kindly provide clarification on the following matters concerning access port protection.&lt;br /&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1746684923569v1.png" alt=" " /&gt;&lt;br /&gt;&lt;span class="fontstyle0"&gt;Is it feasible to access the CPU registers through the Mailbox interface by utilizing the CTRL-AP (Control Access Port)? In other words, can I temporarily disable access port protection by modifying the TAMPC.PROTECT registers via the Mailbox interface?&lt;br /&gt; &lt;br /&gt; &lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Unable to access the nRF54L15-DK after all-erase operation</title><link>https://devzone.nordicsemi.com/thread/533412?ContentTypeID=1</link><pubDate>Tue, 29 Apr 2025 13:16:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f0470ac2-1696-4b87-a72a-80f5e76d9553</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;The chip will by default have access port protection (read back protection) enabled by design.&lt;/p&gt;
&lt;p&gt;So it&amp;#39;s only an eraseall operation that can clear the access port protection, when eraseall is executed the access port protection is disabled until next reset.&lt;/p&gt;
&lt;p&gt;It&amp;#39;s possible to disable access port protection by programming the chip with firmware that disable it from the inside (e.g. write appropriate values to the UICR and registers in RAM). This is for instance what happens when you&amp;nbsp;program the chip during developing a project or if you execute a recover operation. The recover operation will program a small program in start of code space that disable access port protection.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>