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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>About XOSC32M.CONFIG.INTCAP and XOSC32KI.INTCAP</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/121456/about-xosc32m-config-intcap-and-xosc32ki-intcap</link><description>Hi, 
 I have a question about the following registers: 
 ・XOSC32M.CONFIG.INTCAP 
 ・XOSC32KI.INTCAP 
 For these, the reset value is as follows in the data sheet: 
 
 
 
 I checked these two registers with nrf54ldk, but they were not the reset values. </description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 16 May 2025 07:13:33 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/121456/about-xosc32m-config-intcap-and-xosc32ki-intcap" /><item><title>RE: About XOSC32M.CONFIG.INTCAP and XOSC32KI.INTCAP</title><link>https://devzone.nordicsemi.com/thread/535701?ContentTypeID=1</link><pubDate>Fri, 16 May 2025 07:13:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0fea0691-5c71-4b13-b6f1-abed9ccd8d5e</guid><dc:creator>Emil Lenngren</dc:creator><description>&lt;p&gt;Yes, in the data sheet in the register description, all registers are by not retained unless explicitly stated otherwise.&lt;/p&gt;
&lt;p&gt;You can see that&amp;nbsp;&lt;span&gt;XOSC32KI.INTCAP is marked as retained while XOSC32M.CONFIG.INTCAP is not.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;I suspect this is due to the fact that the internal low frequency counter of GRTC will keep running during a soft reset or reset due to wake up from system off.&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About XOSC32M.CONFIG.INTCAP and XOSC32KI.INTCAP</title><link>https://devzone.nordicsemi.com/thread/535675?ContentTypeID=1</link><pubDate>Fri, 16 May 2025 00:18:08 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f3ed1817-c0a3-4e9e-9595-f70460390be6</guid><dc:creator>H-ogawa</dc:creator><description>&lt;p&gt;Hi Emil&lt;/p&gt;
&lt;p&gt;Thank you for your advice.&lt;/p&gt;
&lt;p&gt;I understood that the startup code sets the appropriate registers based on the specified load capacitance.&lt;/p&gt;
&lt;p&gt;You have said that the HFXO INTCAP is not retained across a software reset, but is this documented anywhere?&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Hiroki&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About XOSC32M.CONFIG.INTCAP and XOSC32KI.INTCAP</title><link>https://devzone.nordicsemi.com/thread/535500?ContentTypeID=1</link><pubDate>Thu, 15 May 2025 09:29:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d2258d2c-e6d4-4be5-8199-6cf3fc2f69cf</guid><dc:creator>Emil Lenngren</dc:creator><description>&lt;p&gt;When you use any nRF Connect SDK project, Zephyr will set INTCAP during initialization, before main is called, according to the desired capacitance set in your board device tree file and the trim values in FICR. That is done here:&amp;nbsp;&lt;a href="https://github.com/nrfconnect/sdk-zephyr/blob/43c5dc730e385c238ce00ea91d1a772709b49abf/soc/nordic/nrf54l/soc.c#L41"&gt;https://github.com/nrfconnect/sdk-zephyr/blob/43c5dc730e385c238ce00ea91d1a772709b49abf/soc/nordic/nrf54l/soc.c#L41&lt;/a&gt;. For the devkits, the capacitance is set here:&amp;nbsp;&lt;a href="https://github.com/nrfconnect/sdk-zephyr/blob/43c5dc730e385c238ce00ea91d1a772709b49abf/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi#L31"&gt;https://github.com/nrfconnect/sdk-zephyr/blob/43c5dc730e385c238ce00ea91d1a772709b49abf/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi#L31&lt;/a&gt;. You can&amp;nbsp;use your own desired capacitance values&amp;nbsp;when you create your custom board device tree file.&lt;/p&gt;
&lt;p&gt;The LFXO INTCAP value is retained during a soft reset, while the HFXO INTCAP value is not.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About XOSC32M.CONFIG.INTCAP and XOSC32KI.INTCAP</title><link>https://devzone.nordicsemi.com/thread/535475?ContentTypeID=1</link><pubDate>Thu, 15 May 2025 08:13:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:07bfe66f-0d15-4a30-b534-99f69de80408</guid><dc:creator>H-ogawa</dc:creator><description>&lt;p&gt;&lt;span&gt;Hi,&lt;/span&gt;&lt;span&gt;Sigurd&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Thank you for your reply.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;When I try this, do I erase it and then read the address value with nrfutil device?&lt;/p&gt;
&lt;p&gt;Also, does this value change when you write firmware?&lt;/p&gt;
&lt;p&gt;I have written the sample code for dtm.&lt;/p&gt;
&lt;p&gt;best regards,&lt;/p&gt;
&lt;p&gt;Hiroki&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About XOSC32M.CONFIG.INTCAP and XOSC32KI.INTCAP</title><link>https://devzone.nordicsemi.com/thread/535467?ContentTypeID=1</link><pubDate>Thu, 15 May 2025 07:52:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2f564683-4d74-4953-85f9-060fb52d7255</guid><dc:creator>Sigurd Hellesvik</dc:creator><description>&lt;p&gt;These are likely written when you build and flash for the DK, and one is retained over resets.&lt;br /&gt;Try to erase the DK, then power it off and on again, and then recover the DK. The registers should now have their reset values.&lt;/p&gt;
&lt;p&gt;Ref &lt;br /&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1747295532195v3.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About XOSC32M.CONFIG.INTCAP and XOSC32KI.INTCAP</title><link>https://devzone.nordicsemi.com/thread/535424?ContentTypeID=1</link><pubDate>Wed, 14 May 2025 23:42:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:151325ba-23ca-4b58-a8b2-70a96021c63c</guid><dc:creator>H-ogawa</dc:creator><description>&lt;p&gt;Hi,&lt;span&gt;Sigurd&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;XOSC32M.CONFIG.INTCAP 0x26&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;XOSC32KI.INTCAP 0x13&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Hiroki&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About XOSC32M.CONFIG.INTCAP and XOSC32KI.INTCAP</title><link>https://devzone.nordicsemi.com/thread/535281?ContentTypeID=1</link><pubDate>Wed, 14 May 2025 08:57:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ffc722a8-88be-4943-bf03-414639a5fd08</guid><dc:creator>Sigurd Hellesvik</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
[quote user=""]I checked these two registers with nrf54ldk, but they were not the reset values.[/quote]
&lt;p&gt;What are the values you read?&lt;/p&gt;
&lt;p&gt;Regards,&lt;br /&gt;Sigurd Hellesvik&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>