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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>GRTC issues on a custom board</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/122578/grtc-issues-on-a-custom-board</link><description>Hello, 
 
 I&amp;#39;ve developed an application on the nRF54L15DK, and have bought Insight SIP&amp;#39;s ISP2454, featuring the same chip. I tried flashing the new chip with a hello world application, but I am running into issues. 
 I ran RTT, but I&amp;#39;m not getting any</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 03 Jul 2025 12:58:45 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/122578/grtc-issues-on-a-custom-board" /><item><title>RE: GRTC issues on a custom board</title><link>https://devzone.nordicsemi.com/thread/541329?ContentTypeID=1</link><pubDate>Thu, 03 Jul 2025 12:58:45 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:501b30a0-c573-4abd-b0fa-73a01e46c04b</guid><dc:creator>Edvin</dc:creator><description>&lt;p&gt;What board files are you building your application with?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Can you try to remove the devicetree overlay file? Just build it without that one, and see if the behavior is the same. I just recently tested a PCB that didn&amp;#39;t have the LFXO, and I only used these two:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC=y
CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL=n&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;For testing, you can also try to add this:&lt;br /&gt;&lt;pre class="ui-code" data-mode="text"&gt;# Disable the unsupported driver
CONFIG_NRFX_TIMER0=n

# Enable the necessary drivers
CONFIG_NRFX_TIMER10=y&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Although I don&amp;#39;t think they are necessary for the hello_world sample.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Edvin&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GRTC issues on a custom board</title><link>https://devzone.nordicsemi.com/thread/540822?ContentTypeID=1</link><pubDate>Mon, 30 Jun 2025 08:20:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0059e511-7289-4dc8-8270-094a862d41a0</guid><dc:creator>ian1442</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;First of all, thank you for your help!&lt;/p&gt;
&lt;p&gt;I&amp;#39;ve implemented the changes you recommended, but I&amp;#39;m still getting the same error.&lt;/p&gt;
&lt;p&gt;Here&amp;#39;s my prj.conf:&lt;/p&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;# nothing here&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_LOG&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_USE_SEGGER_RTT&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_LOG_BACKEND_RTT&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_UART_CONSOLE&lt;/span&gt;&lt;span&gt;=n&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_RTT_CONSOLE&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;CONFIG_PRINTK&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_DEBUG_OPTIMIZATIONS&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_NORDIC_SECURITY_BACKEND&lt;/span&gt;&lt;span&gt;=n&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_DEBUG&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_DEBUG_INFO&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_DEBUG_OPTIMIZATIONS&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_ASSERT&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;# Enable MPU&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_ARM_MPU&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;CONFIG_CLOCK_CONTROL&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_CLOCK_CONTROL_NRF&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_NRF_GRTC_TIMER&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_NRF_GRTC_START_SYSCOUNTER&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_CLOCK_CONTROL_NRF_K32SRC_FREQUENCY&lt;/span&gt;&lt;span&gt;=32768&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;# Disable LFXO (external 32kHz crystal)&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL&lt;/span&gt;&lt;span&gt;=n&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;# Disable synthesized LFCLK from HFCLK&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH&lt;/span&gt;&lt;span&gt;=n&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;CONFIG_CLOCK_CONTROL_NRF_K32SRC_500PPM&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC_CALIBRATION&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_LF_ALWAYS_ON&lt;/span&gt;&lt;span&gt;=y&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;and the devicetree overlay:&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;/delete-node/&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;&amp;amp;&lt;/span&gt;&lt;span&gt;lfxo&lt;/span&gt;&lt;span&gt;;&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;&amp;amp;&lt;/span&gt;&lt;span&gt;grtc&lt;/span&gt;&lt;span&gt; {&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;/delete-property/&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;clocks&lt;/span&gt;&lt;span&gt;;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;/delete-property/&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;clock-names&lt;/span&gt;&lt;span&gt;;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;clocks&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;=&lt;/span&gt;&lt;span&gt; &amp;lt;&lt;/span&gt;&lt;span&gt;&amp;amp;&lt;/span&gt;&lt;span&gt;pclk&lt;/span&gt;&lt;span&gt;&amp;gt;;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &lt;/span&gt;&lt;span&gt;clock-names&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;=&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;&amp;quot;hfclock&amp;quot;&lt;/span&gt;&lt;span&gt;;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;};&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;Am I missing something?&lt;br /&gt;I&amp;#39;m building this on ncs 3.0.1, with 3.0.1 toolchain&lt;/span&gt;&lt;/div&gt;
&lt;/div&gt;
&lt;/div&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GRTC issues on a custom board</title><link>https://devzone.nordicsemi.com/thread/540703?ContentTypeID=1</link><pubDate>Fri, 27 Jun 2025 11:50:35 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3a636fef-0d6e-47e1-8d6a-3936b7a7c49c</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Based on that you see PC at&amp;nbsp;nrfy_grtc.h file, line 300 and the thread you link to it seems that there is no functioning 32.768 kHz crystal. If so, you need to do everythign explained in &lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/122313/nrf54l15-lfrc-32khz-clock-configuration-issue/539553"&gt;this post&lt;/a&gt;&amp;nbsp;(including implementing the changes in the linked pull request, as those are not yet in nRF Connect SDK, not even in main at the time of writing). You also need the clock related configs from &lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/122313/nrf54l15-lfrc-32khz-clock-configuration-issue/540082"&gt;this post &lt;/a&gt;(from he same thread).&lt;/p&gt;
&lt;p&gt;I see that the documenation for&amp;nbsp;ISP2454 states that it has a 32.768 kHz crytal though, so it could be that there are problems with some devices, or that the load cap configuration is incorrect for the crystal (see &lt;a href="https://github.com/nrfconnect/sdk-zephyr/blob/0e2db3cf7d3e53739cea9e60d4970081c6338b7a/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi#L29"&gt;here&lt;/a&gt; for how it is configured in the board files for the DK)? In any case, that should not be a problem if you use LFRC, so it is wroth it as an experiment.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>