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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF5340 &amp;amp; nPM1300 decoupling cap</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/122906/nrf5340-npm1300-decoupling-cap</link><description>Hi 
 I have some questions about nRF5340 &amp;amp; nPM1300 decoupling cap 
 nRF5340 
 1.For pin A3/D2/H11/K1/L5/L11, ref. SCH is 1uF*1 and 0.1uF*5, could we only connect 1uF*1 and 0.1uF*2? 
 
 2.For consider all VDD pin(A3/D2/H11/K1/L5/L11/B7/B10/E11/B12), could</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 14 Jul 2025 14:50:09 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/122906/nrf5340-npm1300-decoupling-cap" /><item><title>RE: nRF5340 &amp; nPM1300 decoupling cap</title><link>https://devzone.nordicsemi.com/thread/542407?ContentTypeID=1</link><pubDate>Mon, 14 Jul 2025 14:50:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ca4448f3-ad17-4f93-8a4b-a0d4fc9ed435</guid><dc:creator>Kazi Afroza Sultana</dc:creator><description>&lt;p&gt;Hello Poki,&lt;/p&gt;
&lt;p&gt;&lt;span&gt;1.For pin A3/D2/H11/K1/L5/L11, ref. SCH is 1uF*1 and 0.1uF*5, could we only connect 1uF*1 and 0.1uF*2?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;2.For consider all VDD pin(A3/D2/H11/K1/L5/L11/B7/B10/E11/B12), could we&amp;nbsp;connect&amp;nbsp;1uF*3 and 0.1uF*2?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Our Reference design has several 100nF (0.1uF) for QKAA and&amp;nbsp;&lt;strong&gt;1 × 1 µF&lt;/strong&gt;&amp;nbsp;and&amp;nbsp;&lt;strong&gt;5 × 0.1 µ&amp;nbsp;F&lt;/strong&gt;&amp;nbsp;(for WCS) capacitors per group.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/7026.pastedimage1752501967623v1.png" alt=" " /&gt;&amp;nbsp;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/7444.pastedimage1752501994477v3.png" alt=" " /&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Reducing this to only&amp;nbsp;&lt;/span&gt;&lt;strong&gt;1 × 1 µF&lt;/strong&gt;&lt;span&gt;&amp;nbsp;and&amp;nbsp;&lt;/span&gt;&lt;strong&gt;2 × 0.1 µF&lt;/strong&gt;&lt;span&gt;&amp;nbsp;is&amp;nbsp;&lt;/span&gt;not recommended&lt;span&gt;. It is highly recommended to follow the reference design. Missing decoupling capacitors can lead to instability or increased noise, especially in RF applications.&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;For nPm1300,&lt;/p&gt;
&lt;p&gt;&lt;span&gt;1.We don&amp;#39;t use pin C3 VBUSOUT function, could we let C3 pin floating?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;No, C3 pin can not be in floating position. A 1uF capacitor should be connected to C3 pin.&amp;nbsp;&lt;a href="https://docs.nordicsemi.com/bundle/nwp_050/page/WP/nwp_050/vbusout_capacitor.html"&gt;https://docs.nordicsemi.com/bundle/nwp_050/page/WP/nwp_050/vbusout_capacitor.html&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;2.Pin C6 VOUT2&amp;nbsp;ref. SCH is 10uF*1，could we connect 4.7uF*1?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;It is recommended to follow the reference design. Because&amp;nbsp;4.7 µF is allowed if its effective capacitance is ≥ 4 µF under all conditions. It may drop under some conditions. So, it&amp;#39;s better to follow the reference design for maintaining margin&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;3.&amp;nbsp;.Pin A4 LSOUT1/VOUTLDO1&amp;nbsp;ref. SCH is 10uF*2，could we connect 4.7uF*3?&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;This is possible as it&amp;#39;s mentioned in the documentation &amp;#39;&amp;#39;The effective total output capacitance for each pin must be a minimum of 6 µF for stability and operation.&amp;#39;&amp;#39; source:&amp;nbsp;&lt;a href="https://docs.nordicsemi.com/bundle/nwp_050/page/WP/nwp_050/ldo_output_capacitor.html"&gt;LDO and load switch output capacitor&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;So, 4.7uF*3 can ensure 14.1uF capacitance.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>