SPI speed and consistency issues using nRF52840 with ADS131M04EVM

RE: SPI speed and consistency issues using nRF52840 with ADS131M04EVM

gwan0624 — Sun, 02 Nov 2025 13:44:30 GMT

I think there is a huge delay using spi_transceive function, which based zephyr ROTS.

Did you try nrfx spi driver based spi communication? (using nrfx_spim_xfer)

I also attach some example code:

#include <zephyr/kernel.h>
#include <stdio.h>

#include <zephyr/sys/printk.h>
#include <zephyr/device.h>

#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/spi.h>

#include <nrfx_spim.h>




/* =================================================================== */

static const nrfx_spim_t spim_inst = NRFX_SPIM_INSTANCE(4);


static uint8_t rx_buf1;
static uint8_t tx_cmd_buf;
K_SEM_DEFINE(sem_data_ready, 0, 1);



static int rhd_nrfx_spi_transfer_blocking(uint16_t tx_command, uint8_t *rx_buffer)
{
    uint8_t tx_b[2]; // for 16 bit communication
    tx_b[0] = (tx_command >> 8) & 0xFF; // MSB
    tx_b[1] = tx_command & 0xFF;        // LSB
    nrfx_spim_xfer_desc_t xfer = NRFX_SPIM_XFER_TRX(tx_b, sizeof(tx_b), rx_buffer, 2); 
    nrfx_err_t result = nrfx_spim_xfer(&spim_inst, &xfer, 0);  
    return (result == NRFX_SUCCESS) ? 0 : -EIO;
}

/* =================================================================== */


int main(void)
{
    int err;
   

    nrfx_spim_config_t spim_config = {
        .sck_pin      = 47, // P1.15
        .mosi_pin     = 46, // P1.14
        .miso_pin     = 45, // P1.13
        .ss_pin       = 44, // P1.12
        .ss_active_high = false,
        .irq_priority = NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY,
        .orc          = 0xFF,
        .frequency    = 16000000UL,
        .mode         = NRF_SPIM_MODE_0,
        .bit_order    = NRF_SPIM_BIT_ORDER_MSB_FIRST,
        .use_hw_ss    = true, 
        .ss_duration  = 2,    
   
    };



    err = nrfx_spim_init(&spim_inst, &spim_config, NULL, NULL);
	if (err != NRFX_SUCCESS) {
        printk("NRFx SPIM blocking init failed: %d\n", err);
        return 0;
    }


    uint8_t rx_main_buffer[2];

    while (1) {

         err = rhd_nrfx_spi_transfer_blocking(0xFF, rx_main_buffer);

    }
    return 0;
}

RE: SPI speed and consistency issues using nRF52840 with ADS131M04EVM

BenD — Mon, 21 Jul 2025 22:34:57 GMT

Thanks for the suggestions!

I believe the static buffer suggestion will help with some of the performance, but I have been having some trouble implementing some of your recommended changes and was hoping you could provide some clarification.

1) As long as I redefine the pins in my overlay file (CS, MISO, MOSI, DRDY, etc.), should I not be able to use any GPIO pins without affecting performance? The PCB we eventually hope to run our code on does not use the standard configuration of the DK for SPI.

2) For changing the delay of the chip select pin, is this not done by the third argument of SPI_DT_SPEC_GET automatically?

3) I tried to set up my code to follow your example as best as I can tell, but there seems to be some discrepancies between your example and the Zephyr documentation. In addition, according to the .yaml file for the ADS131 provided by TI, they want the chip select pin to be in the parent node of the ads131m02 (At one point, I did make a custom .yaml for storing the cs as you did, but that did not seem to be the root problem). The project builds, flashes, and begins running successfully on the board, but it seems to break whenever I try to call spi_transeive() for the first time. I have attached my overlay file and my new main.c file where I have been testing things. Any further guidance you could provide would be greatly appreciated.

devzone.nordicsemi.com/.../ti_2C00_ads1013.yaml devzone.nordicsemi.com/.../84487.main.c devzone.nordicsemi.com/.../5554.nrf52840dk_5F00_nrf52840.overlay

RE: SPI speed and consistency issues using nRF52840 with ADS131M04EVM

Susheel Nuguru — Mon, 21 Jul 2025 07:39:27 GMT

Hi Benjamin,

I will try to suggest some changes relevant to PCA10056 (nRF52840 DK). On PCA10056, the ADS131M04EVM’s CS actually sits on P0.28 and the data-ready pin on P0.11 (not P0.15/17). Also change a bit of the code to switch to zero-delay CS toggling and reuse static SPI buffers so we shave a few microseconds each transfer. You dts should have something similar to below

&spi3 {
    status = "okay";

    #address-cells = <1>;
    #size-cells    = <0>;

    /* ADS131M04 on SPI3 CS line 0 */
    ads131m02: spidev@0 {
        compatible           = "ti,ads131m04";
        reg                  = <0>;                     /* CS = SPI3-CS0 */
        spi-max-frequency    = <20000000>;              /* 20 MHz SCLK, reliable under 25 MHz limit */
        cs-gpios             = <&gpio0 28 GPIO_ACTIVE_LOW>;  /* P0.28 wired to ADS131nCS */
        drdy-gpios           = <&gpio0 11 GPIO_ACTIVE_HIGH>; /* P0.11 wired to ADS131nDRDY */
        status               = "okay";
    };
};

Spi setup in your main.c

#define ADS_NODE   DT_NODELABEL(ads131m02)


static const struct gpio_dt_spec     cs_gpio  = GPIO_DT_SPEC_GET(ADS_NODE, cs_gpios);
static const struct spi_cs_control   cs_ctrl  = {
    .gpio       = CS_GPIO_DEV(&cs_gpio),
    .pin        = CS_GPIO_PIN(&cs_gpio),
    .delay      = 0,   /* no pre-clock delay */
    .hold_delay = 0,   /* release CS immediately after bits */
};

/* Single, static buffers to eliminate per-loop stack setup */
static uint8_t     tx_buf[15];
static uint8_t     rx_buf[15];
static struct spi_buf     tx_buf_desc = { .buf = tx_buf, .len = sizeof(tx_buf) };
static struct spi_buf     rx_buf_desc = { .buf = rx_buf, .len = sizeof(rx_buf) };
static struct spi_buf_set tx = { .buffers = &tx_buf_desc, .count = 1 };
static struct spi_buf_set rx = { .buffers = &rx_buf_desc, .count = 1 };

static const struct spi_dt_spec spi = SPI_DT_SPEC_GET(ADS_NODE,
    SPI_WORD_SET(8) | SPI_TRANSFER_MSB | SPI_MODE_CPHA, 0);

static const struct spi_config spi_cfg = {
    .frequency = DT_PROP(ADS_NODE, spi_max_frequency),
    .operation = SPI_WORD_SET(8) | SPI_TRANSFER_MSB | SPI_MODE_CPHA,
    .slave     = DT_REG_ADDR(ADS_NODE),
    .cs        = &cs_ctrl,
};

void sample_loop(void)
{
    size_t   samples = 0;
    bool     ready;

    /* wait for first DRDY to go high */
    while (!gpio_pin_get_dt(&GPIO_DT_SPEC_GET(ADS_NODE, drdy_gpios))) {
        k_busy_wait(5);
    }

    while (samples < NUM_SAMPLES) {

        if (atomic_cas(&ready, true, false)) {
            /* issue 15-byte frame in <8 µs @20 MHz */
            memset(tx_buf, 0, sizeof(tx_buf));
            spi_transceive(spi.bus, &spi_cfg, &tx, &rx);
            // …decode rx_buf[3..14] into your channel words…
            samples++;
        }
    }
}