https://devzone.nordicsemi.com/f/nordic-q-a/123408/the-sfdp-dfp-in-the-device-tree-is-not-being-appliedI set the parameters read from the Flash memory into sfdp-dfp in the Device Tree, but the Read command does not work correctly. Although I set the wait cycle for read operations to 10 cycles in sfdp-dfp, it seems that the microcontroller is using 6 cyclesen-USTelligent Community 13Mon, 04 Aug 2025 01:30:39 GMThttps://devzone.nordicsemi.com/thread/544405?ContentTypeID=1Mon, 04 Aug 2025 01:30:39 GMT137ad170-7792-4731-bb38-c0d22fbe4515:bfc90247-c2cb-4d7c-9d8d-b19a7eb5a352yama789<p>Thank you for your reply.</p> <p>Is there a way to change the dummy cycles to 6 cycles?<br /><span>If it is not possible to adjust the parameters on the microcontroller side, we will need to adjust the number of dummy cycles on the Flash side. In that case, I think it would be necessary to customize the device driver(nrf_qspi_nor.c). What do you think?</span><br /><span>First of all, there is no API implemented to read the Configuration Register on nrf_qspi_nor.c. There is also no method available to write to it.</span></p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/544283?ContentTypeID=1Fri, 01 Aug 2025 08:48:57 GMT137ad170-7792-4731-bb38-c0d22fbe4515:ff08117f-a629-4fd8-935a-d585b3408ba8Turbo J<p>You may wanna read the PS (7.25.9) - the QSPI peripherial is picky about command instruction bytes and not programmable in this regard. Your chip may or may not be incompatible.</p> <p>And yes, the driver won&#39;t care about&nbsp;<span>sfdp-bfp</span>&nbsp;stuff here. It can&#39;t use it much.</p><div style="clear:both;"></div>