Nrf54L15 SPI Mastter Moe CLK And Recive

RE: Nrf54L15 SPI Mastter Moe CLK And Recive

LinJunXuan — Wed, 13 Aug 2025 14:45:01 GMT

Very Thanks

RE: Nrf54L15 SPI Mastter Moe CLK And Recive

Kenneth — Tue, 12 Aug 2025 11:56:22 GMT

[quote user="LinJunXuan"] If we really want to send and receive a byte, we need tx_1en=1 and rx_1en=2[/quote]

That is the intended way yes.

Kenneth

RE: Nrf54L15 SPI Mastter Moe CLK And Recive

LinJunXuan — Mon, 11 Aug 2025 13:31:40 GMT

That is to say, rx and tx happened together. If we really want to send and receive a byte, we need tx_1en=1 and rx_1en=2, or we can directly call the two functions spiw_rite_dt and spi_dead_tt once each. Do I understand it this way

RE: Nrf54L15 SPI Mastter Moe CLK And Recive

Kenneth — Mon, 11 Aug 2025 12:13:02 GMT

Hello,

The rx and tx transactions occurring in parallel, so if set both length to 1, then only 1 byte on spi.

Kenneth

RE: Nrf54L15 SPI Mastter Moe CLK And Recive

LinJunXuan — Mon, 11 Aug 2025 11:46:24 GMT

my prj.conf

# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y

# 启用RTT核心功能
CONFIG_USE_SEGGER_RTT=n

#Enable hadware stack protection
CONFIG_HW_STACK_PROTECTION=y

#Enable MPU
CONFIG_ARM_MPU=y

#日志
CONFIG_LOG_PRINTK=y
CONFIG_LOG_BACKEND_RTT=y

# GPIO使能
CONFIG_GPIO=y

# 使能串口驱动
CONFIG_SERIAL=y
CONFIG_UART_ASYNC_API=y

# 使能SPI
CONFIG_SPI=y


# 使能ADC
CONFIG_ADC=y
       
# 开启TF-M, 即 末尾 带ns
CONFIG_TFM_SECURE_UART=n
CONFIG_TFM_LOG_LEVEL_SILENCE=y

RE: Nrf54L15 SPI Mastter Moe CLK And Recive

LinJunXuan — Mon, 11 Aug 2025 11:35:04 GMT

// SPI PIN
spi21_default: spi21_default {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 1, 11)>,
			<NRF_PSEL(SPIM_MOSI, 1, 13)>,
			<NRF_PSEL(SPIM_MISO, 1, 14)>;
		};
	};  
	spi21_sleep: spi21_sleep {
		group1 {
			psels = <NRF_PSEL(SPIM_SCK, 1, 11)>,
			<NRF_PSEL(SPIM_MOSI, 1, 13)>,
			<NRF_PSEL(SPIM_MISO, 1, 14)>;
			low-power-enable;
		};
	};