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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>The issue of timer interrupt delay caused by filesystem operations</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/123724/the-issue-of-timer-interrupt-delay-caused-by-filesystem-operations</link><description>After attempting to write data to the filesystem, my 125μs timer interrupt (highest priority) is delayed by tens to hundreds of microseconds. 
 I enabled the following configuration and call settings_save_one to save the data. 
 CONFIG_SETTINGS=y CONFIG_SETTINGS_NVS</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 18 Aug 2025 14:28:32 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/123724/the-issue-of-timer-interrupt-delay-caused-by-filesystem-operations" /><item><title>RE: The issue of timer interrupt delay caused by filesystem operations</title><link>https://devzone.nordicsemi.com/thread/545946?ContentTypeID=1</link><pubDate>Mon, 18 Aug 2025 14:28:32 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:42d4aa27-38ad-4a3f-a66b-4ecdb128ceb7</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi Lee,&amp;nbsp;&lt;br /&gt;What you observed is most likely because of the CPU stalling when doing a write/erase to flash.&amp;nbsp;&lt;br /&gt;&amp;nbsp;It takes some time to write a word in flash (~50us AFAIK). So there will be a chance of additional latency when you do flash activity and having a timer interrupt.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;One solution I can think of is to move your interrupt handler into&amp;nbsp;FLPR core&amp;nbsp;and run it on SRAM.&amp;nbsp;&lt;br /&gt;Or you will have to split the critical period that all the flash activity has to wait until the critical period is finished.&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>