Unable to identify the nrf5340 chip through the swd interface.

RE: Unable to identify the nrf5340 chip through the swd interface.

Ressa — Tue, 26 Aug 2025 09:27:03 GMT

Hi,

You need to provide the debugger with a target voltage reference (VTref/VTG) from the nRF5340’s VDD rail, even when the board is battery-powered. The J-Link will only enable its SWD level shifters when it senses this voltage, and the logic levels must match the target’s VDD. Connect VTref (VTG) on the debugger to the board’s VDD, also ensure common GND. Do not feed 5 V (or battery voltage) into VTref. VTref should reflect the actual SoC VDD (typically ~1.7–3.6 V).

Best regards,
Ressa

RE: Unable to identify the nrf5340 chip through the swd interface.

valerian123 — Mon, 25 Aug 2025 13:25:02 GMT

Connect the SEGGER J-Link programmer via the SWD interface and configure the 1.8V level.The chip cannot be found.It's a test PCB board that I made myself based on the circuit in the reference manual.

RE: Unable to identify the nrf5340 chip through the swd interface.

Turbo J — Mon, 25 Aug 2025 10:26:54 GMT

What JLink exactly? Some of the DKs don't like 1.8V targets.