<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/123981/enabling-uarte0-causes-i2c0-ssd1306-driver-initialization-failure</link><description>I&amp;#39;m using zephyr with a custom board (nrf52840) which has a ssd1306 OLED. I have it configured to use i2c0 and is working fine with lvgl. 
 When I try to enable uart0 (using the async API), the ssd1306 device initialization fails. I can confirm that both</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 05 Sep 2025 12:08:36 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/123981/enabling-uarte0-causes-i2c0-ssd1306-driver-initialization-failure" /><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547906?ContentTypeID=1</link><pubDate>Fri, 05 Sep 2025 12:08:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8512bcdf-9539-4270-b9ed-f7041a2680ca</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I am glad to hear that it works consistently now.&lt;/p&gt;
[quote user="sidcha"]t&amp;#39;s just not clear to me how not having the DMA module can cause this issue. [/quote]
&lt;p&gt;It does sound like an issue/compatibility with the underlying driver, or a timing-wise problem wrt. I2C&amp;nbsp;stop condition or something like that, but this is guessing from my side. Let me know if you run into any other issues with the TWIM module.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;I hope you have a great weekend!&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547813?ContentTypeID=1</link><pubDate>Thu, 04 Sep 2025 20:01:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:609ffab6-4285-4c5f-95a6-f2fd4b870013</guid><dc:creator>sidcha</dc:creator><description>[quote userid="2115" url="~/f/nordic-q-a/123981/enabling-uarte0-causes-i2c0-ssd1306-driver-initialization-failure/547779"]This is the change that you did, correct?[/quote]
&lt;p&gt;Yes.&lt;/p&gt;
[quote userid="2115" url="~/f/nordic-q-a/123981/enabling-uarte0-causes-i2c0-ssd1306-driver-initialization-failure/547779"]That being said, it shall still work with the non-DMA capable NRF_TWI module. It sounds like there has been a timing-wise issue with the non-DMA capable NRF_TWI module, but it is hard to say without being able to recreate this scenario locally.[/quote]
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;TBH, it was a typo that led to i2c0 to not have DMA and I am glad that this combination works. It&amp;#39;s just not clear to me how not having the DMA module can cause this issue. It&amp;#39;s for sure not a physical issue as I have them both working together now.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547779?ContentTypeID=1</link><pubDate>Thu, 04 Sep 2025 14:39:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c2bd3e49-e204-486d-bfee-23c3a0a7ab68</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user="sidcha"]After some more trial and errors, I noticed that the uart0 was configured to do DMA while the i2c0 was not. First I tried removing DMA from uart0 -- it did not help. I then added DMA to i2c0 and things start working.[/quote]
&lt;p&gt;This is the change that you did, correct?&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;i2c0 {
	compatible = &amp;quot;nordic,nrf-twim&amp;quot;; /* was nordic,nrf-twi */
	...rest of config
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;This will use the DMA capable NRF_TWIM peripheral, as compared to the NRF_TWI peripheral.&lt;/p&gt;
&lt;p&gt;I would recommend that you use the DMA-capable&amp;nbsp;periperhal when speed is one of your primary requirements (which it usually is with displays).&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;That being said, it shall still work with the non-DMA capable NRF_TWI module. It sounds like there has been a timing-wise issue with the non-DMA capable NRF_TWI module, but it is hard to say without being able to recreate this scenario locally.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547682?ContentTypeID=1</link><pubDate>Wed, 03 Sep 2025 18:06:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:008d45c3-5162-47cd-8277-4b1240cfba07</guid><dc:creator>sidcha</dc:creator><description>&lt;p&gt;&amp;gt;&amp;nbsp;However, the transaction on the SDA/SCL pins only show two. Is there a third transaction shifted out on the pins?&lt;/p&gt;
&lt;p&gt;No,&amp;nbsp;what I posted was everything that happened during the failure case.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;After some more trial and errors, I noticed that the uart0 was configured to do DMA while the i2c0 was not. First I tried removing DMA from uart0 -- it did not help. I then added DMA to i2c0 and things start working.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;For now this setup (both DMA) works but I would still like to understand how this is a problem. Can you help explaining?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547271?ContentTypeID=1</link><pubDate>Mon, 01 Sep 2025 08:36:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e59d1fa2-1139-43a5-bf3f-82597d19c59d</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user="sidcha"]&lt;p&gt;The posted scope capture is soon after reset after that there is no activity on the bus.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I suspect that&amp;nbsp;you missed at-least one of my earlier replies?&lt;/p&gt;[/quote]
&lt;p&gt;Thank you for confirming this.&lt;/p&gt;
&lt;p&gt;In your log, it shows 3 rw transactions:&lt;/p&gt;
&lt;p&gt;&lt;em&gt;[00:00:00.763,458] &amp;lt;dbg&amp;gt; i2c: i2c_dump_msgs_rw: I2C msg: i2c@40003000, addr=3c &lt;/em&gt;&lt;br /&gt;&lt;em&gt;[00:00:00.763,488] &amp;lt;dbg&amp;gt; i2c: i2c_dump_msgs_rw: W len=01: 00&lt;/em&gt;&lt;br /&gt;&lt;em&gt;[00:00:00.763,549] &amp;lt;dbg&amp;gt; i2c: i2c_dump_msgs_rw: W P len=01: ae&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;However, the transaction on the SDA/SCL pins only show two. Is there a third transaction shifted out on the pins?&lt;/p&gt;
[quote user="sidcha"]I did just that and posted where it returns -EIO: the very first I2C transaction; in driver, that is at the call to ssd1306_suspend() &lt;a href="https://github.com/zephyrproject-rtos/zephyr//blob/main/drivers/display/ssd1306.c#L441"&gt;here&lt;/a&gt;.[/quote]
&lt;p&gt;Good. This command corresponds with the &amp;quot;0xae&amp;quot; that is sent, ie define&amp;nbsp;SSD1306_DISPLAY_OFF, which is sent with a write and a stop condition (indicated with W and P).&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;You mention that you have a scenario where this works as intended. Can you please share plots (of the SDA/SCL via a logic analyzer), so I can compare the transactions in the beginning?&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547182?ContentTypeID=1</link><pubDate>Fri, 29 Aug 2025 11:17:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4025d1aa-96c7-425b-ba88-acb723f6138f</guid><dc:creator>sidcha</dc:creator><description>&lt;p&gt;&lt;span style="font-size:inherit;"&gt;&amp;gt; Please share the full boot sequence, as asked for here:&lt;/span&gt;&lt;/p&gt;
&lt;div class="quote-header"&gt;&lt;/div&gt;
&lt;div class="quote-header"&gt;&lt;span style="font-size:inherit;"&gt;I have code that enabled the OLED and UART. On reset, I see the following logs (which I posted earlier) and then nothing after that. Those are all the things that happen at boot.&lt;/span&gt;&lt;/div&gt;
&lt;div class="quote-header"&gt;&lt;/div&gt;
&lt;div class="quote-header"&gt;&lt;/div&gt;
&lt;div class="quote-header"&gt;&lt;pre class="ui-code" data-mode="text"&gt;[00:00:00.763,458] &amp;lt;dbg&amp;gt; i2c: i2c_dump_msgs_rw: I2C msg: i2c@40003000, addr=3c    
[00:00:00.763,488] &amp;lt;dbg&amp;gt; i2c: i2c_dump_msgs_rw:    W      len=01: 00
[00:00:00.763,549] &amp;lt;dbg&amp;gt; i2c: i2c_dump_msgs_rw:    W    P len=01: ae
[00:00:00.763,549] &amp;lt;err&amp;gt; ssd1306: Failed to initialize device!
*** Booting Zephyr OS build v4.2.0-2290-g617b71bc174b ***        
[00:00:00.764,709] &amp;lt;err&amp;gt; lvgl: Display device 0 is not ready                                                                                            
[00:00:00.764,892] &amp;lt;err&amp;gt; app: Device not ready, aborting test&lt;/pre&gt;&lt;/div&gt;
&lt;div class="quote-header"&gt;&lt;/div&gt;
&lt;div class="quote-header"&gt;&lt;span style="font-size:inherit;"&gt;Physically on SCL/SDA lines, there is no other activity.&lt;/span&gt;&lt;/div&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;&amp;gt;&amp;nbsp;The amount of debug logs in the driver is minimal, so you need to debug this. Enter debug mode, use break points to check where it returns EIO:&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;I did just that and posted where it returns -EIO: the very first I2C transaction; in driver, that is at the call to ssd1306_suspend() &lt;a href="https://github.com/zephyrproject-rtos/zephyr//blob/main/drivers/display/ssd1306.c#L441"&gt;here&lt;/a&gt;.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;&amp;gt;&amp;nbsp;Try to expand the value of that config. Again, I have no idea if the picture that you posted of the SDA/SCL is mid-transaction or if that is the very first one. Please confirm.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;The posted scope capture is soon after reset after that there is no activity on the bus.&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;span style="font-size:inherit;"&gt;I suspect that&amp;nbsp;you missed at-least one of my earlier replies?&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547178?ContentTypeID=1</link><pubDate>Fri, 29 Aug 2025 11:01:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c3dd039a-b8ad-4536-9e2a-06b9ceae4066</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Please share the full boot sequence, as asked for here:&lt;/p&gt;
[quote user="hkn"]&lt;p&gt;There is no direct error in the image that you show. The sensor ACK, by keeping the line low at the LSBit.&lt;/p&gt;
&lt;p&gt;Do you have any runtime logs or similar? What happens in a normal scenario?&lt;/p&gt;
&lt;p&gt;Is this the very first transaction, or is it in the middle of the init? There is so much information that is not presented here. You need to provide traces/logs from boot-up.&lt;/p&gt;[/quote]
&lt;p&gt;&lt;/p&gt;
[quote user="sidcha"]Can you please be more specific about what kind of logs you care about so I can produce them for you? Such as which configs I should have enabled.[/quote]
&lt;p&gt;The amount of debug logs in the driver is minimal, so you need to debug this.&lt;/p&gt;
&lt;p&gt;Enter debug mode, use break points to check where it returns EIO:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://github.com/zephyrproject-rtos/zephyr//blob/main/drivers/display/ssd1306.c#L441-L473"&gt;https://github.com/zephyrproject-rtos/zephyr//blob/main/drivers/display/ssd1306.c#L441-L473&lt;/a&gt;&lt;/p&gt;
[quote user="sidcha"]I found that the I2C transfer takes longer than I2C_TRANSFER_TIMEOUT_MSEC[/quote]
&lt;p&gt;Try to expand the value of that config. Again, I have no idea if the picture that you posted of the SDA/SCL is mid-transaction or if that is the very first one. Please confirm.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547175?ContentTypeID=1</link><pubDate>Fri, 29 Aug 2025 10:48:21 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ba1c26de-1239-4e4e-b151-4c7b1d6d0325</guid><dc:creator>sidcha</dc:creator><description>&lt;p&gt;&amp;gt; Do you have any runtime logs or similar? What happens in a normal scenario?&lt;/p&gt;
&lt;p&gt;Most of the logs I have are from Bluetooth layer in my app which is irrelevant to this issue. The only log line I get from Zephyr is this:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;[00:00:00.763,458] &amp;lt;dbg&amp;gt; i2c: i2c_dump_msgs_rw: I2C msg: i2c@40003000, addr=3c    
[00:00:00.763,488] &amp;lt;dbg&amp;gt; i2c: i2c_dump_msgs_rw:    W      len=01: 00
[00:00:00.763,549] &amp;lt;dbg&amp;gt; i2c: i2c_dump_msgs_rw:    W    P len=01: ae
[00:00:00.763,549] &amp;lt;err&amp;gt; ssd1306: Failed to initialize device!
*** Booting Zephyr OS build v4.2.0-2290-g617b71bc174b ***        
[00:00:00.764,709] &amp;lt;err&amp;gt; lvgl: Display device 0 is not ready                                                                                            
[00:00:00.764,892] &amp;lt;err&amp;gt; app: Device not ready, aborting test
&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;As you can see, that&amp;#39;s not very helpful. Can you please be more specific about what kind of logs you care about so I can produce them for you? Such as which configs I should have enabled.&lt;/p&gt;
&lt;p&gt;&amp;gt; Is this the very first transaction, or is it in the middle of the init?&lt;/p&gt;
&lt;p&gt;This is soon after reset and then that&amp;#39;s the end of all I2C activity on the bus&amp;nbsp;in the failing case. When things work, there are ofc a lot more activity.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Update: Added&amp;nbsp;logs with debug level for I2C and SSD1306&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547170?ContentTypeID=1</link><pubDate>Fri, 29 Aug 2025 10:02:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d8a9fd7d-b7a9-4f45-960e-4beb443c1fbc</guid><dc:creator>sidcha</dc:creator><description>&lt;div&gt;
&lt;div&gt;&lt;span&gt;Another update: I switched to a bit-banged i2c for the OLED and again things work as expected.&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;Tracking down the failure from software, I found that the I2C transfer takes longer than I2C_TRANSFER_TIMEOUT_MSEC &lt;/span&gt;&lt;span&gt;and&lt;/span&gt;&lt;span&gt; leads to a &lt;/span&gt;&lt;span&gt;nrfx_twi_disable&lt;/span&gt;&lt;span&gt;() &lt;/span&gt;&lt;span&gt;+&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;i2c_nrfx_twi_recover_bus&lt;/span&gt;&lt;span&gt;() calls followed by &lt;/span&gt;&lt;span&gt;-&lt;/span&gt;&lt;span&gt;EIO &lt;/span&gt;&lt;span&gt;return&lt;/span&gt;&lt;span&gt;.&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;span&gt;Here is the call path that leads to &lt;/span&gt;&lt;span&gt;this&lt;/span&gt;&lt;span&gt; error:&lt;/span&gt;&lt;/div&gt;
&lt;br /&gt;
&lt;div&gt;&lt;pre class="ui-code" data-mode="text"&gt;i2c_nrfx_twi_transfer()
    i2c_nrfx_twi_msg_transfer()
    ret = k_sem_take(&amp;amp;data-&amp;gt;completion_sync, I2C_TRANSFER_TIMEOUT_MSEC);
    if ret != 0:
	/* Whatever the frequency, completion_sync should have
	* been given by the event handler.
	*
	* If it hasn&amp;#39;t, it&amp;#39;s probably due to an hardware issue
	* on the I2C line, for example a short between SDA and
	* GND.
	* This is issue has also been when trying to use the
	* I2C bus during MCU internal flash erase.
	*
	* In many situation, a retry is sufficient.
	* However, some time the I2C device get stuck and need
	* help to recover.
	* Therefore we always call i2c_nrfx_twi_recover_bus()
	* to make sure everything has been done to restore the
	* bus from this error.
	*/
	nrfx_twi_disable(&amp;amp;config-&amp;gt;twi);
	(void)i2c_nrfx_twi_recover_bus(dev);
	ret = -EIO;
&lt;/pre&gt;&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;I cannot find any evidence to a hardware failure on the i2c bus when control reached this point. I have 2 prototypes which have the same failure so I&amp;#39;m reluctant to write it off as a board specific failure too :)&lt;/div&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547169?ContentTypeID=1</link><pubDate>Fri, 29 Aug 2025 09:59:58 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:54f88733-b103-4ac0-9b57-9a82f65a6ee3</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;There is no direct error in the image that you show. The sensor ACK, by keeping the line low at the LSBit.&lt;/p&gt;
&lt;p&gt;Do you have any runtime logs or similar? What happens in a normal scenario?&lt;/p&gt;
&lt;p&gt;Is this the very first transaction, or is it in the middle of the init? There is so much information that is not presented here. You need to provide traces/logs from boot-up.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user="sidcha"]I was wondering if anything else was shared, such as IRQs, DMAs etc.,[/quote]
&lt;p&gt;No, they are not shared between TWIM0 and UARTE0 on the nRF52840.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547166?ContentTypeID=1</link><pubDate>Fri, 29 Aug 2025 09:46:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:525a5b3b-d1a4-49d2-a7d2-a1d2db38afa2</guid><dc:creator>sidcha</dc:creator><description>&lt;p&gt;Thanks for the response. I&amp;#39;m aware that those peripherals are non-shared. I was wondering if anything else was shared, such as IRQs, DMAs etc.,&lt;/p&gt;
&lt;p&gt;Here is a scope capture of the failure:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://imgur.com/a/TLaj1I9"&gt;https://imgur.com/a/TLaj1I9&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;I found Zephyr tries to send a single 0 byte to the OLED at address 0x3c. This can be seen in the capture as well.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547150?ContentTypeID=1</link><pubDate>Fri, 29 Aug 2025 08:16:08 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:40ef00d3-2b87-42a6-aea7-2fb024df9f94</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;On the nRF52-series devices, the UART is not a shared resource, which it is on the nRF53-series and on-ward.&lt;/p&gt;
&lt;p&gt;This means that TWIM0 and UARTE0 can be used simultaneously without any issues, provided that they do not create a pin conflict for each other. Ie. there is no reason why these two peripherals cannot coexist on the nRF52840.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
[quote user="sidcha"]I can post scope screenshots and logs tomorrow when I get back to my desk.[/quote]
&lt;p&gt;perfect, this would be great.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547107?ContentTypeID=1</link><pubDate>Thu, 28 Aug 2025 16:32:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:45e23136-5f21-4d1b-bee5-cbd08d1fd1af</guid><dc:creator>sidcha</dc:creator><description>&lt;p&gt;I have 4.7K external pull-ups on SCL and SDA lines. The clock speed was unset till now, but setting it to&amp;nbsp;100 kHZ&lt;span&gt;&lt;span&gt;&amp;nbsp;(with `&lt;/span&gt;&lt;/span&gt;&lt;span&gt;clock-frequency&lt;/span&gt;&lt;span&gt; &lt;/span&gt;&lt;span&gt;=&lt;/span&gt;&lt;span&gt; &amp;lt;&lt;/span&gt;&lt;span&gt;I2C_BITRATE_STANDARD&lt;/span&gt;&lt;span&gt;&amp;gt;;` in the i2c0 node) has no effect.&lt;/span&gt;&lt;/p&gt;
&lt;div&gt;
&lt;div&gt;&lt;span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;span&gt;I can post scope screenshots and logs tomorrow when I get back to my desk.&lt;/span&gt;&lt;/div&gt;
&lt;div&gt;&lt;/div&gt;
&lt;div&gt;But I&amp;#39;m curious to understand your reasoning... Since i2c0 works if I disable uart0, I&amp;#39;d&amp;nbsp;expect the issue to have something to&amp;nbsp;the way they interact with each other. If it were a physical issue, that would still be the case&amp;nbsp;with i2c0 alone no?&lt;/div&gt;
&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547084?ContentTypeID=1</link><pubDate>Thu, 28 Aug 2025 13:03:08 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:09e1ab03-bb0a-4fd4-b07d-282c0681022e</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Your custom board has external pull resistors on SDA/SCL? What is the speed? If using 400 kHz mode, you will need strong pulls, in the order of &amp;lt; 5kOhm. I suggest that you scope your pins on both scenarios, share run time logs of both working and non-working scenarios.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547078?ContentTypeID=1</link><pubDate>Thu, 28 Aug 2025 12:20:29 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a56cbc61-b27c-42c2-99ef-8909d8c34ad8</guid><dc:creator>sidcha</dc:creator><description>&lt;p&gt;Like I said, I&amp;#39;m&amp;nbsp;defining my own board, so there&amp;nbsp;isn&amp;#39;t&amp;nbsp;anything to inherit from.&lt;/p&gt;
&lt;p&gt;Here is my pinctrl definitions:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;/ {
	pinctrl: pin-controller {
		uart0_default: uart0_default {
			phandle = &amp;lt; 0x2 &amp;gt;;
			group1 {
				psels = &amp;lt; 0x2b &amp;gt;;
			};
			group2 {
				psels = &amp;lt; 0x100002c &amp;gt;;
				bias-pull-up;
			};
		};

		uart0_sleep: uart0_sleep {
			phandle = &amp;lt; 0x3 &amp;gt;;
			group1 {
				psels = &amp;lt; 0x2b &amp;gt;,
				        &amp;lt; 0x100002c &amp;gt;;
				low-power-enable;
			};
		};

		i2c0_default: i2c0_default {
			phandle = &amp;lt; 0x4 &amp;gt;;
			group1 {
				psels = &amp;lt; 0xc000004 &amp;gt;,
				        &amp;lt; 0xb000005 &amp;gt;;
			};
		};

		i2c0_sleep: i2c0_sleep {
			group1 {
				psels = &amp;lt; 0xc000004 &amp;gt;,
				        &amp;lt; 0xb000005 &amp;gt;;
				low-power-enable;
			};
		};
	};
};&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547057?ContentTypeID=1</link><pubDate>Thu, 28 Aug 2025 10:12:22 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:85f15ea0-9967-4eec-b175-302af8b4ff91</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Those are not the relevant parts from the file. In the future, please do not truncate information when asked for specific files (or other things, like build logs etc).&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The segment I am after is the pinctrl definitions, as you have used the same definition as in the board itself.&lt;/p&gt;
&lt;p&gt;In the board, the RTS/CTS is also defined, which are inherited when you re-use the same pinctrl names. So, if you rather make a new pinctrl definition, like this:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;pinctrl {
	my_uart0_default: my_uart0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 1, 11)&amp;gt;;
		};
		group2 {
			psels = &amp;lt;NRF_PSEL(UART_RX, 1, 12)&amp;gt;;
			bias-pull-up;
		};
	};

	my_uart0_sleep: my_uart0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 1, 11)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RX, 1, 12)&amp;gt;;
			low-power-enable;
		};
	};
    ...rest of definitions
};

&amp;amp;uart0 {
    status = &amp;quot;okay&amp;quot;;
	pinctrl-0 = &amp;lt; &amp;amp;my_uart0_default &amp;gt;;
	pinctrl-1 = &amp;lt; &amp;amp;my_uart0_sleep &amp;gt;;
	pinctrl-names = &amp;quot;default&amp;quot;,
	                &amp;quot;sleep&amp;quot;;
	...rest of configuration
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Does it then work?&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547041?ContentTypeID=1</link><pubDate>Thu, 28 Aug 2025 08:49:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:cedc767c-2861-44bb-bee0-32e9cb648303</guid><dc:creator>sidcha</dc:creator><description>&lt;p&gt;The relevant sections:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;/ {
	soc {
		uart0: uart@40002000 {
			reg = &amp;lt; 0x40002000 0x1000 &amp;gt;;
			interrupts = &amp;lt; 0x2 0x1 &amp;gt;;
			compatible = &amp;quot;nordic,nrf-uarte&amp;quot;;
			status = &amp;quot;okay&amp;quot;;
			current-speed = &amp;lt; 0x1c200 &amp;gt;;
			pinctrl-0 = &amp;lt; &amp;amp;uart0_default &amp;gt;;
			pinctrl-1 = &amp;lt; &amp;amp;uart0_sleep &amp;gt;;
			pinctrl-names = &amp;quot;default&amp;quot;,
			                &amp;quot;sleep&amp;quot;;
			phandle = &amp;lt; 0x12 &amp;gt;;
		};

		i2c0: i2c@40003000 {
			#address-cells = &amp;lt; 0x1 &amp;gt;;
			#size-cells = &amp;lt; 0x0 &amp;gt;;
			reg = &amp;lt; 0x40003000 0x1000 &amp;gt;;
			interrupts = &amp;lt; 0x3 0x1 &amp;gt;;
			easydma-maxcnt-bits = &amp;lt; 0x10 &amp;gt;;
			zephyr,pm-device-runtime-auto;
			compatible = &amp;quot;nordic,nrf-twi&amp;quot;;
			pinctrl-0 = &amp;lt; &amp;amp;i2c0_default &amp;gt;;
			pinctrl-names = &amp;quot;default&amp;quot;;
			status = &amp;quot;okay&amp;quot;;

			ssd1306_128x64: ssd1306@3c {
				compatible = &amp;quot;solomon,ssd1306fb&amp;quot;;
				reg = &amp;lt; 0x3c &amp;gt;;
				width = &amp;lt; 0x80 &amp;gt;;
				height = &amp;lt; 0x40 &amp;gt;;
				segment-offset = &amp;lt; 0x0 &amp;gt;;
				page-offset = &amp;lt; 0x0 &amp;gt;;
				display-offset = &amp;lt; 0x0 &amp;gt;;
				multiplex-ratio = &amp;lt; 0x3f &amp;gt;;
				segment-remap;
				com-invdir;
				prechargep = &amp;lt; 0x22 &amp;gt;;
			};
		};
	};
};&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547039?ContentTypeID=1</link><pubDate>Thu, 28 Aug 2025 08:41:54 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:b88a979f-76c6-4044-91ad-0d83c17dc28b</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Can you please share the zephyr.dts file, located in build/application-name/zephyr folder?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547036?ContentTypeID=1</link><pubDate>Thu, 28 Aug 2025 08:38:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:90c5c2a9-2fd6-4f23-b0f2-e645656f4827</guid><dc:creator>sidcha</dc:creator><description>&lt;p&gt;I have my own board definition. In this board, I define the following:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;pinctrl {
	uart0_default: uart0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 1, 11)&amp;gt;;
		};
		group2 {
			psels = &amp;lt;NRF_PSEL(UART_RX, 1, 12)&amp;gt;;
			bias-pull-up;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(UART_TX, 1, 11)&amp;gt;,
				&amp;lt;NRF_PSEL(UART_RX, 1, 12)&amp;gt;;
			low-power-enable;
		};
	};

	i2c0_default: i2c0_default {
		group1 {
			psels = &amp;lt;NRF_PSEL(TWIM_SDA, 0, 4)&amp;gt;,
				&amp;lt;NRF_PSEL(TWIM_SCL, 0, 5)&amp;gt;;
		};
	};

	i2c0_sleep: i2c0_sleep {
		group1 {
			psels = &amp;lt;NRF_PSEL(TWIM_SDA, 0, 4)&amp;gt;,
				&amp;lt;NRF_PSEL(TWIM_SCL, 0, 5)&amp;gt;;
			low-power-enable;
		};
	};
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;And the the ssd1306&amp;nbsp;entry:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;i2c0 {
	status = &amp;quot;okay&amp;quot;;
	ssd1306_128x64: ssd1306@3c {
		compatible = &amp;quot;solomon,ssd1306fb&amp;quot;;
		reg = &amp;lt;0x3c&amp;gt;;
		width = &amp;lt;128&amp;gt;;
		height = &amp;lt;64&amp;gt;;
		segment-offset = &amp;lt;0&amp;gt;;
		page-offset = &amp;lt;0&amp;gt;;
		display-offset = &amp;lt;0&amp;gt;;
		multiplex-ratio = &amp;lt;63&amp;gt;;
		segment-remap;
		com-invdir;
		prechargep = &amp;lt;0x22&amp;gt;;
	};
};&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Enabling uarte0 causes i2c0 ssd1306 driver initialization failure</title><link>https://devzone.nordicsemi.com/thread/547031?ContentTypeID=1</link><pubDate>Thu, 28 Aug 2025 08:23:43 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:116ec245-3cbe-42bd-bec7-d7a348015fd4</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Which GPIOs are you using for I2C0?&lt;/p&gt;
[quote user=""]I have triple checked that they don&amp;#39;t have any overlapping pin configurations.[/quote]
&lt;p&gt;Have you checked that the RTS/CTS does not overlap? That is by-default P0.05 to P0.08 on the nRF52840-DK.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>