Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

RE: Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

viric — Tue, 09 Sep 2025 20:54:15 GMT

I finally solved the situation.

To get LPCOMP ANADETECT to work I missed two steps before the system off: START the task, and wait for its READY event.

When GPIO DETECT was not working for me is because I was not getting into system-off, due to some other complex bug of the whole software. Once I solved that, GPIO DETECT worked fine as well.

I cannot tell about the unexpected reset sources I had while I was doing all this. Other pieces of the whole software I don't know about, probably.

RE: Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

viric — Mon, 08 Sep 2025 22:17:02 GMT

I already removed the ram retention part and now it doesn't reset.

I tried LPCOMP + ANADETECT, and reset does not occur for me (code in prev post).

I also tried GPIO as well, without success. No reset when I connect the pin to 3V3:

        NRF_P0->PIN_CNF[31] = ((uint32_t)GPIO_PIN_CNF_DIR_Input        << GPIO_PIN_CNF_DIR_Pos)
                           | ((uint32_t)GPIO_PIN_CNF_INPUT_Connect    << GPIO_PIN_CNF_INPUT_Pos)
                           | ((uint32_t)GPIO_PIN_CNF_PULL_Pulldown    << GPIO_PIN_CNF_PULL_Pos)
                           | ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1       << GPIO_PIN_CNF_DRIVE_Pos)
                           | ((uint32_t)GPIO_PIN_CNF_SENSE_High   << GPIO_PIN_CNF_SENSE_Pos);
        NRF_P0->DETECTMODE = 0;

Am I missing something in LPCOMP or GPIO to get the wakeup?

Do I need to set up interrupts in any particular way?

RE: Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

Kenneth — Mon, 08 Sep 2025 18:10:17 GMT

Hi,

You can try to disable global interrupts before executing this, and in that case also use directly NRF_POWER->SYSTEMOFF = 1; (if I remember correctly). On wakeup you can try to double check that it's waking up from system off reset (and not a soft reset due to fatal error or similar) by reading the RESETREAS register:
https://docs.nordicsemi.com/bundle/ps_nrf52840/page/power.html#ariaid-title35

Maybe it's another wakeup source happening here.

Kenneth

RE: Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

viric — Mon, 08 Sep 2025 02:11:27 GMT

I'm trying a simpler scenario with stable VDDH (USB power) without any code about ram retention, and it still doesn't work:

        // Wake up if power rises again
        pinMode(31, INPUT);
        nrf_lpcomp_config_t c;
        c.reference = NRF_LPCOMP_REF_SUPPLY_4_8;
        c.detection = NRF_LPCOMP_DETECT_UP;
        c.hyst = NRF_LPCOMP_HYST_NOHYST;
        nrf_lpcomp_configure(NRF_LPCOMP, &c);
        nrf_lpcomp_input_select(NRF_LPCOMP, NRF_LPCOMP_INPUT_7);
        nrf_lpcomp_enable(NRF_LPCOMP);

        auto ok = sd_power_system_off();

Using AIN7. The pin is connected to GND, and once system is off, I connect it to 3V3. It does not reset.

RE: Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

viric — Sun, 07 Sep 2025 18:06:30 GMT

It seems that if I remove the code piece about RAM retention (in code in original post) then there is no reset.

I don't know what relationship there is between the ram systemoff retention code and the NRESET line, but the correlation is clear. If the for loop about disabling off ram retention is present, NRESET occurs. If I remove the code, there is no reset and LPCOMP doesn't seem to wake up the device ever, when rising VBAT voltage.

RE: Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

viric — Sun, 07 Sep 2025 17:03:08 GMT

I checked the NRESET pin and it has the same shape as VDD, so I guess some part of the circuit is pulling NRESET down. That is the piece that is disturbing in my setup I think. I will have to find this out.

Yellow=NRESET, Blue=VDD

RE: Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

viric — Sun, 07 Sep 2025 16:09:52 GMT

By now I'm checking with a lab regulable voltage supply, choosing the voltage I want in VBAT. The device will have a Li-Ion battery and specifically I want to go System-Off long before it reaches BOR, because in BOR all hangs forever.

I think I found an important surprise with the oscilloscope on VDD (generated by REG0) testing the systemoff->wakeup. As for AIN3 (the high ohm resistors) I cannot see any oscillation at all with the oscilloscope.

VDD seems to go down at some moment related to the SystemOff->reboot. I don't have any other time reference to the event.

If I don't enable the LPCOMP I see a longer pause yet it reboots as well. Strange.

I don't know why the device restarts with LPCOMP disabled.

I also don't know why VDD=3V3, if I am not setting this up; I read that the default should be 1.8V from the REG0. And I don't understand why it falls to 1.62V (from the oscilloscope pictures).

I have to mention that apparently the same code yesterday had a good LPCOMP restart, but today it is restarting apparently no matter what, and I don't know why.

RE: Wake from SystemOFF with LPCOMP ANADETECT, varying VDD

Turbo J — Sun, 07 Sep 2025 15:36:09 GMT

What battery do you use? Many LiPo can't supply enough power when they go below ~3.0Volts. You might be triggering BOR/POR - check voltages with an oscilloscope.

High ohms input can work as an antenna. Make sure that you have a properly sized capacitor on it...