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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>NRF5340: How to configure P0.02 and P0.03 (NFCT) as GPIO?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/124675/nrf5340-how-to-configure-p0-02-and-p0-03-nfct-as-gpio</link><description>Hello, 
 We are working with the nRF5340DK using nRF Connect SDK v2.9.1. Our firmware targets the nrf5340dk_nrf5340_cpuapp_ns board. 
 We would like to use P0.02 and P0.03 as GPIOs, specifically as UART2 RX and TX. From what I have read (for example,</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 30 Sep 2025 14:06:20 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/124675/nrf5340-how-to-configure-p0-02-and-p0-03-nfct-as-gpio" /><item><title>RE: NRF5340: How to configure P0.02 and P0.03 (NFCT) as GPIO?</title><link>https://devzone.nordicsemi.com/thread/550221?ContentTypeID=1</link><pubDate>Tue, 30 Sep 2025 14:06:20 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:88dcd327-c0e4-482c-ad7f-72b33e91858d</guid><dc:creator>bubune</dc:creator><description>&lt;p&gt;Thanks, I was looking at the 2.0.0 schematic revision of the DK board, but I actually have a 2.0.2 DK board. On the 2.0.2 version, the GPIOs are not connected by default &amp;mdash; resistors need to be added and NFC&amp;#39;s&amp;nbsp; resistor removed.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF5340: How to configure P0.02 and P0.03 (NFCT) as GPIO?</title><link>https://devzone.nordicsemi.com/thread/550192?ContentTypeID=1</link><pubDate>Tue, 30 Sep 2025 13:08:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:dc667cd7-09bb-42aa-894c-b3925210da25</guid><dc:creator>Menon</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;The &lt;code&gt;nrfprog --memrd&lt;/code&gt; value you shared confirms that the pins are configured as GPIOs (&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf5340/page/chapters/uicr/doc/uicr.html#ariaid-title9"&gt;see this page&lt;/a&gt;). So, this might not be the issue you are seeing.&lt;/p&gt;
&lt;p&gt;Kind Regards,&lt;/p&gt;
&lt;p&gt;Abhijith&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF5340: How to configure P0.02 and P0.03 (NFCT) as GPIO?</title><link>https://devzone.nordicsemi.com/thread/550178?ContentTypeID=1</link><pubDate>Tue, 30 Sep 2025 12:36:00 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e15af286-10a1-438f-86ee-2887338c173f</guid><dc:creator>Turbo J</dc:creator><description>[quote userid="3376" url="~/f/nordic-q-a/124675/nrf5340-how-to-configure-p0-02-and-p0-03-nfct-as-gpio"]these pins should be usable as UART pins by simply configuring them in the device tree.[/quote]
&lt;p&gt;The backside printing on my NRF5340DK implies otherwise - it shows a not connected (NC) component between the pin header and the GPIO on the NRF chip. Its only connected to the NRF antenna inputs.&lt;/p&gt;
&lt;p&gt;No idea if that changed between board revisions, this board here is the version before they changed the debugger chip to an NRF variant.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF5340: How to configure P0.02 and P0.03 (NFCT) as GPIO?</title><link>https://devzone.nordicsemi.com/thread/550167?ContentTypeID=1</link><pubDate>Tue, 30 Sep 2025 12:08:31 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e0119139-5ad1-4124-a26c-261d0f769752</guid><dc:creator>bubune</dc:creator><description>&lt;p&gt;In addition, when I read the NFCPINS UICR register (0x00FF8028), I get the value &lt;code&gt;0xFFFFFFFE&lt;/code&gt;:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;nrfjprog --memrd 0x00FF8028
0x00FF8028: FFFFFFFE
&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;which is the expected value for configuring the pins as GPIO instead of NFC.&lt;/p&gt;
&lt;p&gt;I don&amp;#39;t knwon what I miss.&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Bruno&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF5340: How to configure P0.02 and P0.03 (NFCT) as GPIO?</title><link>https://devzone.nordicsemi.com/thread/550156?ContentTypeID=1</link><pubDate>Tue, 30 Sep 2025 11:50:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:737bcecb-37e0-4e5c-9a40-b11024e501b3</guid><dc:creator>bubune</dc:creator><description>&lt;p&gt;Hello&amp;nbsp;&lt;span&gt;Abhijith,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;Thanks for your quick reply.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;As explained in the link in my previous post, the symbol &lt;code&gt;uicr&lt;/code&gt; is not known in the &lt;code&gt;nrf5340dk_nrf5340_cpuapp_ns&lt;/code&gt; target.&lt;/p&gt;
&lt;p&gt;I&amp;#39;ve already tried this solution before, but here is the compile log output:&lt;/p&gt;
&lt;pre&gt;&lt;code&gt;Found devicetree overlay: /Users/nono/Documents/git/firmware/app.overlay
devicetree error: /Users/Nono/Documents/git/firmware/app.overlay:23 (column 1): parse error: undefined node label &amp;#39;uicr&amp;#39;
CMake Error at /Users/Nono/Documents/git/firmware/zephyr/cmake/modules/dts.cmake:295 (execute_process):
  execute_process failed command indexes:

    1: &amp;quot;Child return code: 1&amp;quot;&lt;/code&gt;&lt;/pre&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Bruno&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: NRF5340: How to configure P0.02 and P0.03 (NFCT) as GPIO?</title><link>https://devzone.nordicsemi.com/thread/550108?ContentTypeID=1</link><pubDate>Tue, 30 Sep 2025 08:48:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0d89df32-07e1-4452-9cb9-66f888fb9dd8</guid><dc:creator>Menon</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;You need to use a devicetree overlay to configure the NFCT pins as GPIOs. Please try the following overlay file:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;uicr {
nfct-pins-as-gpios;
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;See&lt;a href="https://devzone.nordicsemi.com/f/nordic-q-a/111985/spi-cs-pin-on-nfc-pin"&gt; this devzone case as a reference&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;Kind Regards,&lt;/p&gt;
&lt;p&gt;Abhijith&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>