Compile error trying to use nrfx NVMC library with nRF54L15

RE: Compile error trying to use nrfx NVMC library with nRF54L15

Vidar Berg — Thu, 02 Oct 2025 08:29:39 GMT

Happy to help! The HW (RRAM controller) requires you to explicitly set the write enable bit before performing any writes and it is recommended to clear it immediately after. This to mitigate the risk of memory corruption. A stack overflow, for example, could easily lead to corruption of RRAM if the write enable bit were kept enabled.

RE: Compile error trying to use nrfx NVMC library with nRF54L15

Tom Weber — Thu, 02 Oct 2025 08:22:27 GMT

Thank you!

I assumed that "write" functions in the API would not be usable unless write was enabled, but I see now that they enable the write flag temporarily.

What does the write flag protect against then - the application trying to write directly to an RRAM address without the API?

RE: Compile error trying to use nrfx NVMC library with nRF54L15

Vidar Berg — Thu, 02 Oct 2025 08:11:07 GMT

[quote user="Tom Weber"]OTP can be written even if writing is disabled.[/quote]

The write enable bit is being set inside the nrfx_rramc_otp_word_write() before the actual write, then it's cleared again. See implementation here https://github.com/zephyrproject-rtos/hal_nordic/blob/979a58d0829108b57f10e90b6c3fc35ab6206e4b/nrfx/haly/nrfy_rramc.h#L406

[quote user="Tom Weber"]The nrfx_rramc_otp_word_write() function does not behave according to documentation.[/quote]

The behavior described in the API documentation does not correspond with the datasheet which states that you can only write once after an Erase All. I will forward this to the developers. Thank you for reporting this.

Ref. https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/uicr.html

RE: Compile error trying to use nrfx NVMC library with nRF54L15

Tom Weber — Wed, 01 Oct 2025 14:53:42 GMT

I have two possible bugs to report in the RRAMC driver:

OTP can be written even if writing is disabled.
The nrfx_rramc_otp_word_write() function does not behave according to documentation.

My code:

static int test_otp(void)
{
    nrfx_rramc_config_t config = NRFX_RRAMC_DEFAULT_CONFIG(0);
    nrfx_err_t err;

    err = nrfx_rramc_init(&config, NULL);
    if (err != NRFX_SUCCESS && err != NRFX_ERROR_ALREADY)
    {
        LOG_ERR("Failed to initialize RRAMC: 0x%x", err);
        return -ENODEV;
    }
    LOG_INF("RRAMC write enabled: %d", (int) nrfx_rramc_write_enable_check());
    LOG_INF("OTP[0]: 0x%08x", nrfx_rramc_otp_word_read(0));
    LOG_INF("Write to OTP[0]: %d", (int) nrfx_rramc_otp_word_write(0, 0x5a5a5a5a));
    LOG_INF("OTP[0]: 0x%08x", nrfx_rramc_otp_word_read(0));
    LOG_INF("Write to OTP[0]: %d", (int) nrfx_rramc_otp_word_write(0, 0x00000000));
    LOG_INF("OTP[0]: 0x%08x", nrfx_rramc_otp_word_read(0));
    return 0;
}

The output:

[00:52:20.486,731] <inf> uicr_test: RRAMC write enabled: 0
[00:52:20.486,741] <inf> uicr_test: OTP[0]: 0xffffffff
[00:52:20.486,800] <inf> uicr_test: Write to OTP[0]: 1
[00:52:20.486,805] <inf> uicr_test: OTP[0]: 0x5a5a5a5a
[00:52:20.486,809] <inf> uicr_test: Write to OTP[0]: 0
[00:52:20.486,813] <inf> uicr_test: OTP[0]: 0x5a5a5a5a

Regarding bug 1, the write should not produce a change in the OTP register since according to the API, write is disabled, but the value is changed after the attempted write.

Regarding bug 2, the way I interpret the documentation, given that write is possible (which it happens to be), nrfx_rramc_otp_word_write() should perform the write unless a 0 to 1 transition is requested in any bit, so both calls should succeed, but the second call fails. There is no 0 to 1 transition in 0xffffffff to 0x5a5a5a5a, and none in 0x5a5a5a5a to 0x00000000. Apparently it instead fails unless the existing value is all 1s?

The documentation says:

The OTP is only able to write '0' to bits in the UICR that are erased (set to '1').
It cannot rewrite a bit back to '1'. This function checks if the value currently residing
at the specified index can be transformed to the desired value without any '0' to '1' 
transitions. If yes, then perform the write operation.

Return values
true	Word can be written into the specified OTP index address.
false	Word cannot be written into the specified OTP index address. 
        Erase UICR or change index address.

RE: Compile error trying to use nrfx NVMC library with nRF54L15

Tom Weber — Wed, 01 Oct 2025 12:09:34 GMT

> Set CONFIG_NRFX_RRAMC=y and include nrfx_rram.h instead.

Thank you, this compiles and the init function seems to work.

I would like a way to clear the UICR.

The NVMC API has nrfx_nvmc_uicr_erase() which erases only the UICR.

The RRAMC API has only nrfx_rramc_all_erase() which says it erases the whole RRAM. Doesn't it mean it will erase the program calling the function as well, including the driver code doing the erasing? Or have I misunderstood the documentation?

> For key storage I recommend

Yes, I use the KMU for encryption keys but would like to use OTP for device identity.

RE: Compile error trying to use nrfx NVMC library with nRF54L15

Vidar Berg — Wed, 01 Oct 2025 07:59:42 GMT

Hello,

The nrf54L is using RRAM instead of FLASH technology for non-volatile storage and has a different controller. Unfortunately, I see this part of the documentation has not yet been updated to reflect this.

[quote user=""]It seems I need to set
CONFIG_NRFX_NVMC=y
and use:
#include <nrfx_nvmc.h>[/quote]

Set CONFIG_NRFX_RRAMC=y and include nrfx_rram.h instead.

For key storage I recommend having a look at this section of the SDK documentation https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/device_guides/nrf54l/kmu_basics.html

Best regards,

Vidar