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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>The SPI cannot pull down the CS (Chip Select) automatically via hardware.</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/125305/the-spi-cannot-pull-down-the-cs-chip-select-automatically-via-hardware</link><description>Currently, I have configured cs-gpios in the device tree and loaded the SPI in the main function. Why is D0 (representing CS) kept high in my experimental waveform, and SCLK (D2), MOSI (D4), and MISO (D6) also behave abnormally?</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 30 Oct 2025 12:58:37 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/125305/the-spi-cannot-pull-down-the-cs-chip-select-automatically-via-hardware" /><item><title>RE: The SPI cannot pull down the CS (Chip Select) automatically via hardware.</title><link>https://devzone.nordicsemi.com/thread/552906?ContentTypeID=1</link><pubDate>Thu, 30 Oct 2025 12:58:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a8f58d6f-0353-4116-80ee-da84cb86874b</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Are you testing on a nRF5340-DK?&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;If yes, then P0.15 is not routed to the pin header:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://docs.nordicsemi.com/bundle/ug_nrf5340_dk/page/UG/dk/hw_drawings.html"&gt;https://docs.nordicsemi.com/bundle/ug_nrf5340_dk/page/UG/dk/hw_drawings.html&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;P0.03 is a nfc pin, and must also be handled accordingly on the DK:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://docs.nordicsemi.com/bundle/ug_nrf5340_dk/page/UG/dk/hw_nfc_if.html#d47e117"&gt;https://docs.nordicsemi.com/bundle/ug_nrf5340_dk/page/UG/dk/hw_nfc_if.html#d47e117&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;In addition, this is required in device tree to use NFC pins as generic GPIOs:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;uicr {
	nfct-pins-as-gpios;
};&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kind regards,&lt;/p&gt;
&lt;p&gt;Håkon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: The SPI cannot pull down the CS (Chip Select) automatically via hardware.</title><link>https://devzone.nordicsemi.com/thread/552879?ContentTypeID=1</link><pubDate>Thu, 30 Oct 2025 09:54:13 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7e1fb3cd-b90d-4eab-8649-9a7afbaf4b29</guid><dc:creator>HHJ</dc:creator><description>&lt;p&gt;Typically, after configuring cs-gpios in the device tree, there is no need to bind the CS pin further in the main function. However, the experimental results show that the CS pin must be bound in the main function; otherwise, neither Bluetooth initialization nor SPI transmission will succeed. If cs-gpios is configured in the device tree and the CS pin is still bound in the main function, the experimental results indicate that the CS pin is not pulled high and low as specified. Moreover, the pin bound in the main function competes with the cs-gpios configured in the device tree for control of CS, which also fails to meet the requirement of the hardware automatically pulling down CS.&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1761818044439v1.png" alt=" " /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>