Slow GPIO Output Speed Issue: Inquiring About Causes and Solutions

RE: Slow GPIO Output Speed Issue: Inquiring About Causes and Solutions

Håkon Alseth — Thu, 13 Nov 2025 10:07:22 GMT

Hi,

You need a bit more flexibility and control over the hardware module.

I would recommend that you look into using the nrfx_spim driver directly instead of using the zephyr driver.

https://github.com/zephyrproject-rtos/hal_nordic/tree/master/nrfx/samples/src/nrfx_spim

Kind regards,

Håkon

RE: Slow GPIO Output Speed Issue: Inquiring About Causes and Solutions

HHJ — Thu, 13 Nov 2025 07:32:53 GMT

We are currently using the SPI of the chip hardware without any modifications, directly reading the DTS file via macros, and setting the CS_delay to 0. Our clock is set to 8M, which works well (32 clocks take 4us), but the CS line pulls high 33us after the clock line ends. This makes a single SPI operation take 46us, resulting in the SPI frequency failing to meet our time requirements—since the time consumed by the CS line determines the final SPI frequency. This is quite unreasonable; why does such a strange phenomenon occur?

RE: Slow GPIO Output Speed Issue: Inquiring About Causes and Solutions

Håkon Alseth — Tue, 11 Nov 2025 10:19:39 GMT

Hi,

[quote user="HHJ"]First, let me reply to your first question. After using the nrf_gpio_pin_set / clear functions to directly write to the registers, our speed has reached 2.65 microseconds per complete clock cycle. Since we have a total of 32 clock cycles, the total time consumed is 84.8 microseconds. However, the 32 clock cycles of our hardware SPI can be completed in 4 microseconds. We don't need to reach such a high speed, but our 32 clock cycles should be controlled within 10-20 microseconds at least. Do you have any other methods to increase the speed?[/quote]

You need to change the gpio each 0.15 to 0.3 us to obtain a frequency of 3.2 to 6.4 MHz.

This is not possible to do using the gpio directly. You need to use a dedicated hardware peripheral to do this.

Kind regards,

Håkon

RE: Slow GPIO Output Speed Issue: Inquiring About Causes and Solutions

HHJ — Tue, 11 Nov 2025 09:38:41 GMT

First, let me reply to your first question. After using the nrf_gpio_pin_set / clear functions to directly write to the registers, our speed has reached 2.65 microseconds per complete clock cycle. Since we have a total of 32 clock cycles, the total time consumed is 84.8 microseconds. However, the 32 clock cycles of our hardware SPI can be completed in 4 microseconds. We don't need to reach such a high speed, but our 32 clock cycles should be controlled within 10-20 microseconds at least. Do you have any other methods to increase the speed?
Second, we have already reduced the interrupt frequency, but the TIMER2 still fails to start correctly. Through tests, we can confirm that the HFCLK has been bound to TIMER2. However, we suspect that TIMER2 has not been initialized successfully—the timer never increments, remains at 0, and thus cannot enter the interrupt function. I have integrated the SPI-related code into a single file and hope you can help me analyze the cause.

Kind regards,devzone.nordicsemi.com/.../2654.spi.c

kevin

RE: Slow GPIO Output Speed Issue: Inquiring About Causes and Solutions

Håkon Alseth — Mon, 10 Nov 2025 10:03:24 GMT

Hi,

[quote user="HHJ"]We followed your suggestion to directly write to the registers using the nrf_gpio_pin_set / clear functions, which improved the clock speed of our simulated SPI, but it's still insufficient. [/quote]

What speed did you achieve?

[quote user="HHJ"]Therefore, I defined a timer interrupt function void TIMER2_IRQHandler(void) in an attempt to control the clock frequency myself. Although the program can run, according to the logic analyzer, this timer interrupt is not enabled. We currently have two hypotheses: first, there is no external clock source HFCLK; second, the timer2 timer is not triggering. Here are my current main file, configuration file, and device tree file. Could you please help me analyze the reason?[/quote]

You will not be able to service a interrupt of 125 ns. The CPU will be at 100% load and not able to do any other tasks than entering the ISR function.

Kind regards,

Håkon

RE: Slow GPIO Output Speed Issue: Inquiring About Causes and Solutions

HHJ — Mon, 10 Nov 2025 09:31:13 GMT

We followed your suggestion to directly write to the registers using the nrf_gpio_pin_set / clear functions, which improved the clock speed of our simulated SPI, but it's still insufficient. Therefore, I defined a timer interrupt function void TIMER2_IRQHandler(void) in an attempt to control the clock frequency myself. Although the program can run, according to the logic analyzer, this timer interrupt is not enabled. We currently have two hypotheses: first, there is no external clock source HFCLK; second, the timer2 timer is not triggering. Here are my current main file, configuration file, and device tree file. Could you please help me analyze the reason?devzone.nordicsemi.com/.../5001.main.c devzone.nordicsemi.com/.../8233.app.overlay devzone.nordicsemi.com/.../327556.prj.conf

RE: Slow GPIO Output Speed Issue: Inquiring About Causes and Solutions

Håkon Alseth — Thu, 06 Nov 2025 08:22:59 GMT

Hi,

1. include header hal/nrf_gpio.h and use nrf_gpio_pin_set / clear functions. These will write directly to the register.

2. In addition; Try adding a barrier or a readback of an event register.

Reading back for instance (void)NRF_TIMER2->EVENTS_COMPARE[0]; between each gpio_pin_set function call will generate a PCLK16M wait state, thus you will ensure that the gpio is set/clr with a higher accuracy/speed.

Kind regards,

Håkon