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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF51LM20 QFN52 SWO pin not assigned</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/125473/nrf51lm20-qfn52-swo-pin-not-assigned</link><description>Hi, 
 We are currently using the nRF54L15 QFN48 package, and have the SWO pin routed to our serial debugging interface. I was reviewing the nRF54LM20 QFN52 package documentation as a possible replacement as we would need the extra GPIO pins and would</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 10 Nov 2025 07:19:09 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/125473/nrf51lm20-qfn52-swo-pin-not-assigned" /><item><title>RE: nRF51LM20 QFN52 SWO pin not assigned</title><link>https://devzone.nordicsemi.com/thread/553764?ContentTypeID=1</link><pubDate>Mon, 10 Nov 2025 07:19:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5393c6dd-4759-4967-a244-419e406e48c8</guid><dc:creator>Brutus</dc:creator><description>&lt;p&gt;Hi PJ !&lt;/p&gt;
&lt;p&gt;Thank you for the in depth and detailed answer ! Great suggestions, I will carefully review them and see what fits best to our current design.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF51LM20 QFN52 SWO pin not assigned</title><link>https://devzone.nordicsemi.com/thread/553742?ContentTypeID=1</link><pubDate>Sat, 08 Nov 2025 17:04:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:447029b2-bdfb-4743-bdc5-3f8de51dc6e8</guid><dc:creator>PjGlasso</dc:creator><description>&lt;p&gt;Hi there,&lt;/p&gt;
&lt;p&gt;So I use the Xiao nRF54L15 with the CSP47 talk about no Extra pins..&lt;span class="emoticon" data-url="https://devzone.nordicsemi.com/cfs-file/__key/system/emoji/1f605.svg" title="Sweat smile"&gt;&amp;#x1f605;&lt;/span&gt; Any way Here is why...&lt;/p&gt;
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&lt;div class="Y3BBE" data-sfc-cp="" data-hveid="CAEQAA"&gt;The absence of the SWO (Serial Wire Output) pin on the nRF54LM20 QFN52 package, while present on the larger CSP98 package, is a result of&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;strong class="Yjhzub"&gt;pin multiplexing and the physical pin constraints of the smaller package&lt;/strong&gt;. To accommodate extra GPIOs and USB capability within the limited pin count of the QFN52, certain less critical or optional debugging features like SWO are not assigned to a dedicated physical pin.&lt;span class="uJ19be notranslate" data-wiz-uids="D8pUQ_b,D8pUQ_c"&gt;&lt;span class="vKEkVd" data-animation-atomic=""&gt;&amp;nbsp;&lt;span class="wiMplc ofC0Ud"&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div class="Fsg96" data-sfc-cp=""&gt;&lt;/div&gt;
&lt;div class="AdPoic" data-animation-nesting="" data-sfc-cp=""&gt;Reasoning for the unassigned SWO pin&lt;span class="txxDge notranslate" data-wiz-uids="D8pUQ_g,D8pUQ_h"&gt;&lt;span class="vKEkVd" data-animation-atomic=""&gt;&lt;span class="wiMplc ofC0Ud"&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;ul class="KsbFXc U6u95"&gt;
&lt;li data-hveid="CAMQAA"&gt;&lt;span class="T286Pc" data-sfc-cp=""&gt;&lt;strong class="Yjhzub"&gt;Pin Limitations&lt;/strong&gt;: The QFN52 package has a fixed number of physical pins. When adding new features like USB (which requires dedicated D+ and D- pins) and increasing the general-purpose I/O count compared to the nRF54L15 QFN48, the available pins for optional debugging interfaces become limited.&lt;/span&gt;&lt;/li&gt;
&lt;li data-hveid="CAMQAQ"&gt;&lt;span class="T286Pc" data-sfc-cp=""&gt;&lt;strong class="Yjhzub"&gt;Pin Multiplexing&lt;/strong&gt;: Modern MCUs use pin multiplexing (pin-muxing) to assign different peripheral functions to the same physical pin. In the QFN52 package, the pin that would normally be assigned the SWO function might be shared by other essential peripherals (like the USB or additional GPIOs), and the designers chose to prioritize those other functions for this package variant.&lt;/span&gt;&lt;/li&gt;
&lt;li data-hveid="CAMQAg"&gt;&lt;span class="T286Pc" data-sfc-cp=""&gt;&lt;strong class="Yjhzub"&gt;SWO is an Optional Debugging Aid&lt;/strong&gt;: The SWO pin is used for receiving trace and log data (printf-style debugging) from the device via the Serial Wire Viewer (SWV) or Embedded Trace Macrocell (ETM) features. It is not essential for basic debugging operations like programming, halting, and single-stepping the CPU, which only require SWD (Serial Wire Debug) which uses SWDIO and SWCLK pins.&lt;/span&gt;&lt;span class="uJ19be notranslate" data-wiz-uids="D8pUQ_s,D8pUQ_t"&gt;&lt;span class="vKEkVd" data-animation-atomic=""&gt;&amp;nbsp;&lt;span class="wiMplc ofC0Ud"&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;div class="Fsg96" data-sfc-cp=""&gt;&lt;/div&gt;
&lt;div class="AdPoic" data-animation-nesting="" data-sfc-cp=""&gt;Workaround to have something similar to SWO&lt;span class="txxDge notranslate" data-wiz-uids="D8pUQ_x,D8pUQ_y"&gt;&lt;span class="vKEkVd" data-animation-atomic=""&gt;&lt;span class="wiMplc ofC0Ud"&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div class="Y3BBE" data-sfc-cp="" data-hveid="CAUQAA"&gt;While you cannot have a dedicated SWO pin on the nRF54LM20 QFN52 package, you can use alternative methods to achieve similar debugging functionality:&lt;span class="uJ19be notranslate" data-wiz-uids="D8pUQ_10,D8pUQ_11"&gt;&lt;span class="vKEkVd" data-animation-atomic=""&gt;&amp;nbsp;&lt;span class="wiMplc ofC0Ud"&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;ul class="KsbFXc U6u95"&gt;
&lt;li data-hveid="CAYQAA"&gt;&lt;span class="T286Pc" data-sfc-cp=""&gt;&lt;strong class="Yjhzub"&gt;RTT (Real Time Transfer)&lt;/strong&gt;: This is the most common and recommended alternative to SWO for Nordic devices. RTT is a proprietary Segger technology that uses the standard SWD interface (SWDIO and SWCLK pins) to transfer data between the target MCU and the debugger. It is often faster than SWO, does not require a dedicated pin, and supports multiple data channels for both up-link (target to host) and down-link (host to target) communication. Most modern development environments and the nRF Connect SDK have full support for RTT.&lt;/span&gt;&lt;/li&gt;
&lt;li data-hveid="CAYQAQ"&gt;&lt;span class="T286Pc" data-sfc-cp=""&gt;&lt;strong class="Yjhzub"&gt;UART (Universal Asynchronous Receiver-Transmitter)&lt;/strong&gt;: You can configure one of the available GPIO pins as a standard UART TX pin and use it to send debug messages to your host PC via a USB-to-serial converter. This approach uses two pins (TX and potentially RX if two-way communication is needed) and is slower than RTT, but offers a simple, universally compatible method of outputting data.&lt;/span&gt;&lt;/li&gt;
&lt;li data-hveid="CAYQAg"&gt;&lt;span class="T286Pc" data-sfc-cp=""&gt;&lt;strong class="Yjhzub"&gt;LED/GPIO Toggling&lt;/strong&gt;: For simple debugging scenarios, toggling a GPIO pin or an LED can signal different states in the code.&lt;/span&gt;&lt;span class="uJ19be notranslate" data-wiz-uids="D8pUQ_1c,D8pUQ_1d"&gt;&lt;span class="vKEkVd" data-animation-atomic=""&gt;&amp;nbsp;&lt;span class="wiMplc ofC0Ud"&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;div class="Y3BBE" data-sfc-cp="" data-hveid="CAcQAA"&gt;For your application, transitioning from SWO on the nRF54L15 to&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;strong class="Yjhzub"&gt;RTT on the nRF54LM20&lt;/strong&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;would be the most seamless and performant solution, as it requires minimal hardware changes (only the standard SWD connection) and provides robust logging capabilities.&lt;span class="txxDge notranslate" data-wiz-uids="D8pUQ_1h,D8pUQ_1i"&gt;&lt;span class="vKEkVd" data-animation-atomic=""&gt;&lt;span class="wiMplc ofC0Ud"&gt;&lt;/span&gt;&lt;/span&gt;&lt;/span&gt;&lt;/div&gt;
&lt;div class="Fsg96" data-sfc-cp=""&gt;&lt;/div&gt;
&lt;div class="Fsg96" data-sfc-cp=""&gt;I&amp;#39;m waiting on the LM20A, curious how the onboard usb-c works out.&lt;/div&gt;
&lt;div class="Fsg96" data-sfc-cp=""&gt;&lt;/div&gt;
&lt;div class="Fsg96" data-sfc-cp=""&gt;HTH&lt;/div&gt;
&lt;div class="Fsg96" data-sfc-cp=""&gt;GL :) PJ &amp;nbsp;&lt;span class="emoticon" data-url="https://devzone.nordicsemi.com/cfs-file/__key/system/emoji/270c.svg" title="V"&gt;&amp;#x270c;&lt;/span&gt;&lt;/div&gt;
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