https://devzone.nordicsemi.com/f/nordic-q-a/125486/no-api-to-erase-uicr-on-nrf54l15I followed the recommendation in https://devzone.nordicsemi.com/f/nordic-q-a/124712/compile-error-trying-to-use-nrfx-nvmc-library-with-nrf54l15/550436 to use CONFIG_NRFX_RRAMC. However, nrfx_rramc.h only provides an API to erase both user code and UICRen-USTelligent Community 13Fri, 07 Nov 2025 18:54:25 GMThttps://devzone.nordicsemi.com/thread/553722?ContentTypeID=1Fri, 07 Nov 2025 18:54:25 GMT137ad170-7792-4731-bb38-c0d22fbe4515:37f6dac0-2af1-46c4-b260-70e82f6b20ffKarthikS27<p>Thanks for the clarification Einar!</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/553680?ContentTypeID=1Fri, 07 Nov 2025 13:19:44 GMT137ad170-7792-4731-bb38-c0d22fbe4515:72ae657d-e43a-4e68-8e03-cfecc6f50ce6Einar Thorsrud<p>Hi,</p> <p>The UICR can by design not be erased without performing an erase all operation, that also erases the normal RRAM. This is described in the <a href="https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/uicr.html">UICR chapter in the datasheet</a>:</p> <p style="padding-left:30px;">All UICR registers have a RW1 protection, which means that they can be read multiple times, but written only once when UICR has been erased by the Erase All operation.</p> <p>Note that the Erase All operation is a special mechanism. Generally, there is no concept of erase in RRAM, as a write can flip bits from both 1 to 0 and 0 to 1, unlike with flash. As the UICR registers are write once, this also prevents &quot;erase&quot;.</p> <blockquote></blockquote><div style="clear:both;"></div>