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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF51822: Read/Write WDT registers without HFCLK XOSC will increase sleep current to 700uA</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/12588/nrf51822-read-write-wdt-registers-without-hfclk-xosc-will-increase-sleep-current-to-700ua</link><description>TestWatchdogFeedWhenWFI.rar 
 Hi, Experts: 
 I have a board with external 16M and 32k, and we found that when accessing WDT registers while ext 16M is not running, sleep current will increase to about 700uA, compared to about 3uA while ext 16M is present</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 04 Apr 2016 12:45:55 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/12588/nrf51822-read-write-wdt-registers-without-hfclk-xosc-will-increase-sleep-current-to-700ua" /><item><title>RE: nRF51822: Read/Write WDT registers without HFCLK XOSC will increase sleep current to 700uA</title><link>https://devzone.nordicsemi.com/thread/47793?ContentTypeID=1</link><pubDate>Mon, 04 Apr 2016 12:45:55 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ee85237a-0728-475c-a6b7-910986cb9708</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;Just a small update, the case has been forwarded to R&amp;amp;D and we reproduced on both nRF51 and nRF52. I noticed that if you keep the WDT running when the CPU sleeping, the current consumption remains low as expected. I guess you can use that as a workaround for now, and use an RTC or smth to feed the dog.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF51822: Read/Write WDT registers without HFCLK XOSC will increase sleep current to 700uA</title><link>https://devzone.nordicsemi.com/thread/47792?ContentTypeID=1</link><pubDate>Wed, 16 Mar 2016 16:01:50 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:189d5da5-7833-4c76-9445-8eb4704f44eb</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi LittleMouse,&lt;/p&gt;
&lt;p&gt;I have tested and confirmed the issue here. Seems that if the WDT is configured with the &amp;quot;Halt when CPU sleep&amp;quot; mode, the current will be high every second time we feed the dog (most likely 16MHz clock is kept running).
I will report this issue internally and see what we can do with this.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>