Passing Interrupts NRF54L15 M33 to RISC-V

RE: Passing Interrupts NRF54L15 M33 to RISC-V

Vidar Berg — Mon, 15 Dec 2025 14:21:59 GMT

Hello,

Is the 800 kHz clock signal only active when there is an ongoing data transfer on the bus? And is the goal to sample both the clock and four data lines from the FLPR using the high speed pins on Port 2? If so, is there no other way to determine when a new transfer is about to start than to have a pin interrupt trigger on the clock signal?

Best regards,

Vidar

RE: Passing Interrupts NRF54L15 M33 to RISC-V

RJengr — Fri, 12 Dec 2025 19:49:14 GMT

Would it be possible to DPPI these events to the RISC-V via the EGU?

RE: Passing Interrupts NRF54L15 M33 to RISC-V

ockwie — Fri, 12 Dec 2025 02:45:33 GMT

Yes — but not by firing CPU interrupts on each 800 kHz edge.

Blox Fruits