I2C read failed reg 0x00 err -5

RE: I2C read failed reg 0x00 err -5

Sharon123 — Mon, 23 Feb 2026 04:27:48 GMT

I am uploadede Bclk and wclk digram is pefect but mclk 4 mhz but i did not get sound and output

RE: I2C read failed reg 0x00 err -5

Sharon123 — Sat, 21 Feb 2026 13:55:06 GMT


CONFIG_GPIO=y
CONFIG_PRINTK=y
CONFIG_SERIAL=y
CONFIG_LOG=y
CONFIG_LOG_DEFAULT_LEVEL=3
CONFIG_GPIO=y
CONFIG_I2C=y
CONFIG_I2S=y
CONFIG_MINIMAL_LIBC=y
CONFIG_I2C_NRFX=y
CONFIG_PWM=y
CONFIG_PWM_NRFX=y

CONFIG_PRINTK=y
CONFIG_LOG=y

CONFIG_USE_SEGGER_RTT=y
CONFIG_LOG_BACKEND_RTT=y

CONFIG_LOG_BACKEND_UART=n
CONFIG_UART_CONSOLE=n

CONFIG_LOG_MODE_IMMEDIATE=y

CONFIG_MAIN_STACK_SIZE=4096
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048

CONFIG_PM=n
CONFIG_PM_DEVICE=n
CONFIG_PM_DEVICE_RUNTIME=n

# --- I2S DMA memory ---
CONFIG_I2S=y
CONFIG_I2S_NRFX=y

CONFIG_I2S_TX_BLOCK_COUNT=4

# --- No-cache memory for DMA ---
CONFIG_NOCACHE_MEMORY=y

CONFIG_HEAP_MEM_POOL_SIZE=16384

# I2S
CONFIG_I2S=y
CONFIG_I2S_NRFX=y

# Non-cache RAM for DMA (REQUIRED on nRF54)
CONFIG_NOCACHE_MEMORY=y


CONFIG_DEBUG_OPTIMIZATIONS=y
CONFIG_ASSERT=y
CONFIG_FAULT_DUMP=2

CONFIG_I2S_NRFX_TX_BLOCK_COUNT=32
CONFIG_I2S_NRFX_RX_BLOCK_COUNT=0

CONFIG_I2S_LOG_LEVEL_DBG=y
CONFIG_LOG=y




















CONFIG_GPIO=y
CONFIG_PRINTK=y
CONFIG_SERIAL=y
CONFIG_LOG=y
CONFIG_LOG_DEFAULT_LEVEL=3
CONFIG_GPIO=y
CONFIG_I2C=y
CONFIG_I2S=y
CONFIG_MINIMAL_LIBC=y
CONFIG_I2C_NRFX=y
CONFIG_PWM=y
CONFIG_PWM_NRFX=y

CONFIG_PRINTK=y
CONFIG_LOG=y

CONFIG_USE_SEGGER_RTT=y
CONFIG_LOG_BACKEND_RTT=y

CONFIG_LOG_BACKEND_UART=n
CONFIG_UART_CONSOLE=n

CONFIG_LOG_MODE_IMMEDIATE=y

CONFIG_MAIN_STACK_SIZE=4096
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048

CONFIG_PM=n
CONFIG_PM_DEVICE=n
CONFIG_PM_DEVICE_RUNTIME=n

# --- I2S DMA memory ---
CONFIG_I2S=y
CONFIG_I2S_NRFX=y

CONFIG_I2S_TX_BLOCK_COUNT=4

# --- No-cache memory for DMA ---
CONFIG_NOCACHE_MEMORY=y

CONFIG_HEAP_MEM_POOL_SIZE=16384

# I2S
CONFIG_I2S=y
CONFIG_I2S_NRFX=y

# Non-cache RAM for DMA (REQUIRED on nRF54)
CONFIG_NOCACHE_MEMORY=y


CONFIG_DEBUG_OPTIMIZATIONS=y
CONFIG_ASSERT=y
CONFIG_FAULT_DUMP=2

CONFIG_I2S_NRFX_TX_BLOCK_COUNT=32
CONFIG_I2S_NRFX_RX_BLOCK_COUNT=0

CONFIG_I2S_LOG_LEVEL_DBG=y
CONFIG_LOG=y


overlay 


&pinctrl {
 
   i2s20_default: i2s20_default {
		group1 {
        psels = <
            NRF_PSEL(I2S_SDOUT, 1, 7)
            NRF_PSEL(I2S_SDIN,  1, 6)
            NRF_PSEL(I2S_SCK,   1, 4)
            NRF_PSEL(I2S_LRCK,  1, 5)
           NRF_PSEL(I2S_MCK,   1, 8)
        >;
        };
	};

	i2s20_sleep: i2s20_sleep {
		group1 {
        psels = <
            NRF_PSEL(I2S_SDOUT, 1, 7)
            NRF_PSEL(I2S_SDIN,  1, 6)
            NRF_PSEL(I2S_SCK,   1, 4)
            NRF_PSEL(I2S_LRCK,  1, 5)
            NRF_PSEL(I2S_MCK,   1, 8) 
        >;
        
			low-power-enable;
		};
	};

    i2c21_default: i2c21_default {
        group1 {
            psels =
                    <NRF_PSEL(TWIM_SCL, 1, 12)>,
                    <NRF_PSEL(TWIM_SDA, 1, 13)>;
                    bias-pull-up;
                   
        };
    };

    i2c21_sleep: i2c21_sleep {
        group1 {
            psels = <NRF_PSEL(TWIM_SCL, 1, 12)>,
                    <NRF_PSEL(TWIM_SDA, 1, 13)>;
                    low-power-enable;
        };
    };

	
	pwm22_default: pwm22_default {
		group1 {
				psels = <NRF_PSEL(PWM_OUT0, 1, 11)>;
		};
	};

	pwm22_sleep: pwm22_sleep {
		group1 {
				psels = <NRF_PSEL(PWM_OUT0, 1, 11)>;
			low-power-enable;
		};
	};
};


/ {
	model = "ISC54L15 EVK (Custom)";
	compatible = "nordic,nrf54l15-cpuapp";

	chosen {
		zephyr,console = &uart20;
		zephyr,shell-uart = &uart20;
		zephyr,uart-mcumgr = &uart20;
		zephyr,bt-c2h-uart = &audiocodec;
		zephyr,bt-hci = &audiocodec;
		zephyr,bt-mon-uart = &audiocodec;
		zephyr,code-partition = &audiocodec;
	};

	custom_pins {
		compatible = "gpio-keys";

		codec_reset: codec_reset {
			gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
			label = "Codec Reset";
		};
	};

	leds {
		compatible = "gpio-leds";

		led0: led_0 {
			gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
			label = "User LED 0";
		};

		led1: led_1 {
			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
			label = "PWM LED 1";
		};
	};

	pwmleds {
		compatible = "pwm-leds";

		pwm_led0: pwm_led0 {
			pwms = <&pwm22 0 PWM_USEC(1) PWM_POLARITY_NORMAL>;
		};
	};
};

&i2s20 {
	pinctrl-0 = <&i2s20_default>;
	pinctrl-names = "default";
	status = "okay";
	zephyr,pm-device-runtime-auto;
};

&i2c21{

    compatible = "nordic,nrf-twim";
    pinctrl-0 = <&i2c21_default>;
    pinctrl-1 = <&i2c21_sleep>;
    pinctrl-names = "default", "sleep";

    audiocodec: audiocodec@18 {
        compatible = "i2c-device";
        status = "okay";
        reg = < 0x18 >;
    };

};



&gpio0 {
	status = "okay";
};


&pwm22 {
	status = "okay";
	pinctrl-0 = <&pwm22_default>;
	pinctrl-1 = <&pwm22_sleep>;
	pinctrl-names = "default", "sleep";
};

RE: I2C read failed reg 0x00 err -5

Sharon123 — Sat, 21 Feb 2026 13:48:44 GMT

Not working sir,

new issue is get ,

I have to share my code here

/*
 * Codec-style I2S SLAVE playback using k_mem_slab
 * nRF54Lx DK
 */

#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/i2s.h>
#include <zephyr/sys/printk.h>
#include "codec/codec.h"

#define I2S_NODE DT_NODELABEL(i2s20)

//audio
#define SAMPLE_RATE_HZ     8000
#define SAMPLE_BIT_WIDTH   16
#define CHANNELS           2
#define SAMPLES_PER_BLOCK  160
//#define SAMPLES_PER_BLOCK  (SAMPLE_RATE_HZ / 10)    // 33ms blocks
#define BLOCK_SIZE         (SAMPLES_PER_BLOCK * CHANNELS * sizeof(int16_t))
#define NUM_BLOCKS         120
#define TIMEOUT_MS        1000



static const struct device *i2s_dev = DEVICE_DT_GET(I2S_NODE);

//  memory slab for I2S TX buffers
K_MEM_SLAB_DEFINE(i2s_tx_slab, BLOCK_SIZE, NUM_BLOCKS, 4);

//sine
// static int16_t sine_lut[] = {
//     3211, 6392, 9511, 12539, 15446, 18204, 20787, 23169,
//     25329, 27244, 28897, 30272, 31356, 32137, 32609, 32767,
//     -3212, -6393, -9512, -12540, -15447, -18205, -20788, -23170,
//     -25330, -27245, -28898, -30273, -31357, -32138, -32610, -32767};


static int16_t sine_lut[] = {
    6392,  12539,  18204,  23169,  27244,  30272,  32137,  32767,  32137,
    30272, 27244, 23169, 18204, 12539, 6392, 0, -6393, -12540,
    -18205, -23170, -27245, -30273, -32138, -32767, -32138, -30273, -27245,
    -23170, -18205, -12540, -6393, -1};

// static int16_t sine_lut[8] = {
//      0,
//  23170,
//  32767,
//  23170,
//      0,
// -23170,
// -32768,
// -23170
// };


// Fill block
static void fill_block(int16_t *buf)
{
    int lut_len = ARRAY_SIZE(sine_lut);

    for (int i = 0; i < SAMPLES_PER_BLOCK; i++)
    {
        int16_t s = sine_lut[i % lut_len];
        buf[2 * i] = s;
        buf[2 * i + 1] = s;
        // buf[i] = 28000;
    }
}



int main(void)
{
    struct i2s_config cfg;
    int ret;

    printk("I2S playback (mem_slab)\n");

    // clocking and codec init
    ret = pwm_4mhz();
    if (ret < 0)
    {
        printk("PWM init failed\n");
        return ret;
    }

    for (int i = 0; i < 20; i++)
    {
        ret = i2c_init_codec();
        if (ret == 0)
        {
            break;
        }
        k_msleep(5);
    }
    if (ret < 0)
    {
        printk("Codec init failed\n");
        return ret;
    }

    k_msleep(10);
    // printk("BLOCK=%d  SAMPLES=%d\n", BLOCK_SIZE, SAMPLES_PER_BLOCK);

    if (!device_is_ready(i2s_dev))
    {
        printk("I2S not ready\n");
        return -ENODEV;
    }

    // I2S CONFIG
    cfg.word_size      = SAMPLE_BIT_WIDTH;
    cfg.channels       = CHANNELS;
    cfg.format         = I2S_FMT_DATA_FORMAT_I2S;

    cfg.options        = I2S_OPT_FRAME_CLK_SLAVE |
                         I2S_OPT_BIT_CLK_SLAVE;
    cfg.frame_clk_freq = SAMPLE_RATE_HZ;
    cfg.block_size     = BLOCK_SIZE;
    cfg.timeout        = TIMEOUT_MS;
    cfg.mem_slab       = &i2s_tx_slab;

    ret = i2s_configure(i2s_dev, I2S_DIR_TX, &cfg);
    if (ret < 0) 
    {
        printk("I2S config failed\n");
        return ret;
    }

    printk("Start streaming\n");

    //prefill
    for(int i = 0; i < 30;i++)
    {
        void *block;
        k_mem_slab_alloc(&i2s_tx_slab, &block, K_FOREVER);
        fill_block((int16_t *)block);
        i2s_buf_write(i2s_dev, block, BLOCK_SIZE);
    }

    ret = i2s_trigger(i2s_dev, I2S_DIR_TX, I2S_TRIGGER_START);
    k_msleep(1);
    if (ret < 0) 
    {
        printk("I2S trigger failed\n");
        return ret;
    }

    while (1)
    {
        void *block;

        ret =   k_mem_slab_alloc(&i2s_tx_slab, &block, K_FOREVER);
        if (ret != 0) 
        {
          //k_yield();
            continue;
        }

        fill_block((int16_t *)block);
       
        ret = i2s_buf_write(i2s_dev, block, BLOCK_SIZE);
     
        if (ret == -ENOMEM)
        {
            k_mem_slab_free(&i2s_tx_slab, block);
            printk("free=%d\n", k_mem_slab_num_free_get(&i2s_tx_slab));
            continue;
        }
        // else if (ret < 0)
        // {
           
        //     printk("I2S error %d\n", ret);
        //     i2s_trigger(i2s_dev, I2S_DIR_TX, I2S_TRIGGER_DROP);
        //     k_sleep(K_MSEC(5));
        //     i2s_trigger(i2s_dev, I2S_DIR_TX, I2S_TRIGGER_PREPARE);
        //     k_sleep(K_MSEC(2));
        //     i2s_trigger(i2s_dev, I2S_DIR_TX, I2S_TRIGGER_START);
        //     k_mem_slab_free(&i2s_tx_slab, block);
        //     printk("free=%d\n", k_mem_slab_num_free_get(&i2s_tx_slab));
        //     continue;
        // }
    }
     i2s_trigger(i2s_dev, I2S_DIR_TX, I2S_TRIGGER_DROP); // stop playback
     printk("Stopped\n");
    return 0;

   
}

below codec .c file 

#include <zephyr/kernel.h>
#include <zephyr/drivers/i2c.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include "codec.h"
#include <zephyr/drivers/pwm.h>


#define CODEC_ADDR 0x18 // i2c slave adress
#define RESET_NODE DT_NODELABEL(led0)  // reset pin node

#define PWM_PERIOD_NS 250U   // 4 MHz
#define PWM_PULSE_NS  125U   // 50% duty

const struct gpio_dt_spec codec_reset_pin = GPIO_DT_SPEC_GET(DT_NODELABEL(codec_reset), gpios); // for reset pin

static const struct i2c_dt_spec dev_i2c = I2C_DT_SPEC_GET(DT_NODELABEL(audiocodec));    // i2c device tree

static const struct pwm_dt_spec pwm_led0 = PWM_DT_SPEC_GET(DT_ALIAS(pwm_led0));       //    pwm device tree


/**
 * Register declaration
 */

const register_value REGISTER_DATA[] = {
//			# reg[0][0]   = 0x00   ; Select Page 0
{0,0x00},          // Select Page 0

/* Software reset */
{1,0x01},

/* ---------- PLL CONFIG (MCLK = 4 MHz → 8 kHz Fs) ---------- */
{4,0x03},          // PLL input = MCLK, CODEC_CLK = PLL
{5,0xD4},          // PLL power up, P=5, R=4   D4
{6,0x20},          // J=32
{7,0x00},          // D MSB
{8,0x00},          // D LSB

/* ---------- I2S DIGITAL ---------- */
{27,0x0C},         // I2S, 16bit, slave 0C

/* ---------- DAC CLOCK TREE ---------- */
{11,0x84},         // NDAC=4, power up
{12,0x99},         // MDAC=25, power up
{14,0x80},         // DOSR=128 → Fs = 8kHz
{18,0x84},         // NDAC=4, power up (same as reg 11, but needed for some reason)
{19,0x99},         // ADC power up (same as reg 12, but needed for some reason)
{20,0x80},         //AOSR=128 → Fs = 8kHz (same as reg 14, but needed for some reason)
{29,0x01},         // DAC clock source  0x01
{30,0x84},         // BCLK divider  84

{60,0x00},   // Disable miniDSP, DAC input from serial port
{61,0x00},

/* ---------- DAC POWER / UNMUTE ---------- */
{63,0xD4},        // Soft stepping  D4
{64,0x00},         // Left DAC unmutes
{65,0x00},         // Right DAC unmute
{66,0x00},         // DAC volume 00 dB


{71,0x82},    // beep
{72,0x82},
{81,0x80},
{82,0x00},
{83,0x00},

/* ===================================================== */
/* ===================== PAGE 1 ========================= */
/* ===================================================== */

{0,0x01},          // Select Page 1

/* ---------- Analog Power ---------- */
{30,0x00},        // Analog blocks power control
{31,0xC0},         // HPL + HPR unmute
{32,0xC6},         // Speaker drivers power up

/* ---------- DAC → Headphone ---------- */
{35,0xA8},         // Route DAC L/R → HP
{36,0x80},         // HP volume 0 dB
{37,0x80},         // HP volume 0 dB

/* ---------- Speaker ---------- */
{34,0x30},         // Speaker path enable
{42,0x3D},         // Speaker gain 1D
{43,0x3D},         // Speaker gain 1D
{44,0xC0},         // Speaker unmute

/* ---------- Route DAC → Speaker ---------- */
{38,0x80},
{39,0x80},

/* ---------- MIC (optional) ---------- */
{46,0x00},         // MICBIAS 2.5V 0x0A
{47,0x00},         // MIC gain
{48,0x00},        //0x40
{49,0x00},        //0x40
 
};


const register_value REGISTER_DATA[];


static const struct gpio_dt_spec rst = GPIO_DT_SPEC_GET(RESET_NODE, gpios); // for reset pin

const size_t REGISTER_LEN = sizeof(REGISTER_DATA) / sizeof(register_value);  // length of register data

uint32_t cfg = I2C_MODE_CONTROLLER | I2C_SPEED_SET(I2C_SPEED_STANDARD); // configration of i2c


/**
 * @brief codec_i2c_write
 * @param
 * device tree
 * adress
 * buffer
 * length of message
 */
static int codec_i2c_write(const struct device *dev,
                           uint8_t addr, uint8_t *buf, uint32_t len)
{
    struct i2c_msg msg = {
        .buf = buf,
        .len = len,
        .flags = I2C_MSG_WRITE | I2C_MSG_STOP,
    };

    return i2c_transfer(dev, &msg, 1, addr);
}
/**
 *brief codec_i2c_write_read
    *param device tree
    *param address
    *param write buffer
    *param number of bytes to write
    *param read buffer
    *param number of bytes to read
 */
static int codec_i2c_write_read(const struct device *dev,
                                uint16_t addr,
                                const void *write_buf, size_t num_write,
                                void *read_buf, size_t num_read)
{

    struct i2c_msg msg[2];
    msg[0].buf = (uint8_t *)write_buf;
    msg[0].len = num_write;
    msg[0].flags = I2C_MSG_WRITE;

    msg[1].buf = (uint8_t *)read_buf;
    msg[1].len = num_read;
    msg[1].flags = I2C_MSG_READ | I2C_MSG_STOP;
    return i2c_write_read_dt(dev, write_buf, num_write, read_buf, num_read); // perform i2c write read
}


/*
brief codec_reset_pulse
param none
*/
int codec_reset_pulse(void)
{
    int ret;

    ret = gpio_pin_set_dt(&codec_reset_pin, 1); // LOW → reset active

    k_msleep(10); /* HIGH → reset released */

    ret = gpio_pin_set_dt(&codec_reset_pin, 0); // HIGH → reset released

    k_msleep(20);

    return ret;
}

/**
 * brief codec_write_register
 * param page
 * param reg
 * param val
 */
static int codec_write_register(uint8_t page, uint8_t reg, uint8_t val)
{
    static uint8_t last_page = 0xFF; // invalid page at start
    uint8_t tx_buf[2]; // transmit buffer
    uint8_t rx_buf[2];  // receive buffer
    int err;

    /* Only update page register if page actually changed */
    if (page != last_page)
    {
        tx_buf[0] = 0x00; // Page Select Register
        tx_buf[1] = page; // New Page Number

        err =codec_i2c_write_read(&dev_i2c, CODEC_ADDR, tx_buf, 2, rx_buf, 2); // write page select register
        if (err)
        {
            printk("I2C: page switch failed (page=%u) err=%d\n", page, err); // log error
            return err;
        }

        last_page = page; // update page tracking
        k_msleep(1);      // small delay for codec stability
    }

    /* Now write the actual register */
    tx_buf[0] = reg;
    tx_buf[1] = val;

    err =codec_i2c_write_read(&dev_i2c, CODEC_ADDR, tx_buf, 2, rx_buf, 2); // write register
    if (err)
    {
         printk("[PAGE %u] REG 0x%02X <= 0x%02X  \n",
           page, reg, val);
    }

    return err;
}

/**
 * brief codec_write_table
 * param table
 * param length of table
 */

static int codec_write_table(const register_value *table, size_t len)
{
    uint8_t current_page = 0x00; // start on page 0
    int err;

    for (size_t i = 0; i < len; i++)
    {
        uint8_t reg = table[i].reg_no;  // register number
        uint8_t val = table[i].reg_value;  // register value

        /* Page change */
        if (reg == 0x00)
        {
            uint8_t new_page = val; // new page number

            /* Always change page through page 0 register 0 */
            err = codec_write_register(0x00, 0x00, new_page);   // write page select register
            if (err)
            {
                return err;
            }
            current_page = new_page;  // update current page
            k_msleep(1);  //    small delay for codec stability
            continue;
        }

        /* Normal register write on current page */
        err = codec_write_register(current_page, reg, val);

        printk("reg=0x%02X val=0x%02X err=%d\n", reg, val, err);
        if (err)
        {
            return err;
        }
        k_msleep(1);
    }

    return 0;
}

/**
 *brief codec_probe
 param none
 */
static bool codec_probe(void)
{
    uint8_t reg0 = 0x00;
    uint8_t read_back = 0;

    int err = codec_i2c_write_read(&dev_i2c, CODEC_ADDR, &reg0, 1, &read_back, 1); // write and read reg 0
    if (err)
    {
        printk("I2C probe failed err=%d\n", err);
        return false;
    }

    printk("Codec responded: reg0 = 0x%02X\n", read_back); //   log reg 0 value

    return true;
}

/*
brief codec_i2c_config
param none
*/
static int codec_i2c_config(void)
{
    if (!device_is_ready(dev_i2c.bus)) //   check i2c bus ready
    {
        printk("Error: I2C bus %s is not ready!\n", dev_i2c.bus->name);
        return -1;
    }

    printk("I2C bus ready, addr=0x%02x\n", dev_i2c.addr);  //   log i2c bus ready

    return 0;
}


//pwm 4mhz generation 

/*
brief pwm_4mhz
param none
*/
int pwm_4mhz()
{
    int ret;

    if (!pwm_is_ready_dt(&pwm_led0)) // check pwm device ready
    {
        printk("PWM device not ready\n");
        return 0;
    }

    ret = pwm_set_dt(&pwm_led0, PWM_PERIOD_NS, PWM_PULSE_NS); // configure pwm for 4 MHz
    if (ret)
    {
        printk("PWM cannot generate 4 MHz (ret=%d)\n", ret);
        return -1; // Some error code
    }

    printk("PWM configured: period=%dns pulse=%dns\n", PWM_PERIOD_NS, PWM_PULSE_NS);

    return ret;
}

/*
brief codec_gpios_config
param none
*/
static int codec_gpios_config(void)
{
    int ret;

    if (!gpio_is_ready_dt(&codec_reset_pin)) // check reset pin ready
    {
        printk("Error: Codec reset pin not ready\n");
        return -1;
    }

    ret = gpio_pin_configure_dt(&codec_reset_pin,
                                GPIO_OUTPUT_ACTIVE | GPIO_ACTIVE_LOW); // configure reset pin
    if (ret < 0)
    {
        printk("Error %d: Failed to configure codec reset pin\n", ret);
        return -1;
    }

    return 0;
}

/*
brief i2c_init_codec
param none
 */
int i2c_init_codec()
{
    int err;

    int ret;

    ret = codec_gpios_config(); // codec gpio config
    if (ret != 0)               //    check gpio config error
    {
        return ret;
    }

    k_msleep(20);

    if (!device_is_ready(dev_i2c.bus)) // check i2c bus ready
    {
        printk("I2C bus %s is not ready!\n", dev_i2c.bus->name);
        return -1;
    }

    k_msleep(20);

    printk("I2C bus ready, addr=0x%02x\n",dev_i2c.addr);

    // reset pin config
    codec_reset_pulse();

    /*codec address check*/
    if (!codec_probe())
    {
        printk("Codec not found on I2C address 0x%02X\n", CODEC_ADDR);
        return -EIO;
    }
   //  k_msleep(20);
    printk("Writing codec register table...\n");

    err = codec_write_table(REGISTER_DATA, REGISTER_LEN); // write codec register table
    if (err)
    {
        printk("Codec register table FAILED: %d\n", err);
        return err;
    }

    k_msleep(20);

    printk("Codec init DONE.\n");

    printk("I2C ready\n");
    return 0;
}



I get Mic sound , but during I2s Transmission shows 


Log:


SEGGER J-Link V9.10 - Real time terminal output
SEGGER J-Link EDU V11.0, SN=261002460
Process: JLink.exe
*** Booting nRF Connect SDK v3.2.1-d8887f6f32df ***
*** Using Zephyr OS v4.2.99-ec78104f1569 ***
I2S playback (mem_slab)
PWM configured: period=250ns pulse=125ns
I2C bus ready, addr=0x18
Codec responded: reg0 = 0x01
Writing codec register table...
reg=0x01 val=0x01 err=0
reg=0x04 val=0x03 err=0
reg=0x05 val=0xD4 err=0
reg=0x06 val=0x20 err=0
reg=0x07 val=0x00 err=0
reg=0x08 val=0x00 err=0
reg=0x1B val=0x0C err=0
reg=0x0B val=0x84 err=0
reg=0x0C val=0x99 err=0
reg=0x0E val=0x80 err=0
reg=0x12 val=0x84 err=0
reg=0x13 val=0x99 err=0
reg=0x14 val=0x80 err=0
reg=0x1D val=0x01 err=0
reg=0x1E val=0x84 err=0
reg=0x3C val=0x00 err=0
reg=0x3D val=0x00 err=0
reg=0x3F val=0xD4 err=0
reg=0x40 val=0x00 err=0
reg=0x41 val=0x00 err=0
reg=0x42 val=0x00 err=0
reg=0x47 val=0x82 err=0
reg=0x48 val=0x82 err=0
reg=0x51 val=0x80 err=0
reg=0x52 val=0x00 err=0
reg=0x53 val=0x00 err=0
reg=0x1E val=0x00 err=0
reg=0x1F val=0xC0 err=0
reg=0x20 val=0xC6 err=0
reg=0x23 val=0xA8 err=0
reg=0x24 val=0x80 *** Booting nRF Connect SDK v3.2.1-d8887f6f32df ***
*** Using Zephyr OS v4.2.99-ec78104f1569 ***
I2S playback (mem_slab)
PWM configured: period=250ns pulse=125ns
I2C bus ready, addr=0x18
Codec responded: reg0 = 0x01
Writing codec register table...
reg=0x01 val=0x01 err=0
reg=0x04 val=0x03 err=0
[PAGE 0] REG 0x05 <= 0xD4  
reg=0x05 val=0xD4 err=-5
Codec register table FAILED: -5
I2C bus ready, addr=0x18
Codec responded: reg0 = 0x00
Writing codec register table...
reg=0x01 val=0x01 err=0
reg=0x04 val=0x03 err=0
reg=0x05 val=0xD4 err=0
reg=0x06 val=0x20 err=0
reg=0x07 val=0x00 err=0
reg=0x08 val=0x00 err=0
reg=0x1B val=0x0C err=0
reg=0x0B val=0x84 err=0
reg=0x0C val=0x99 err=0
reg=0x0E val=0x80 err=0
reg=0x12 val=0x84 err=0
reg=0x13 val=0x99 err=0
reg=0x14 val=0x80 err=0
reg=0x1D val=0x01 err=0
reg=0x1E val=0x84 err=0
reg=0x3C val=0x00 err=0
reg=0x3D val=0x00 err=0
reg=0x3F val=0xD4 err=0
reg=0x40 val=0x00 err=0
reg=0x41 val=0x00 err=0
reg=0x42 val=0x00 err=0
reg=0x47 val=0x82 err=0
reg=0x48 val=0x82 err=0
reg=0x51 val=0x80 err=0
reg=0x52 val=0x00 err=0
reg=0x53 val=0x00 err=0
reg=0x1E val=0x00 err=0
reg=0x1F val=0xC0 err=0
reg=0x20 val=0xC6 err=0
reg=0x23 val=0xA8 err=0
reg=0x24 val=0x80 err=0
reg=0x25 val=0x80 err=0
reg=0x22 val=0x30 err=0
reg=0x2A val=0x3D err=0
reg=0x2B val=0x3D err=0
reg=0x2C val=0xC0 err=0
reg=0x26 val=0x80 err=0
reg=0x27 val=0x80 err=0
reg=0x2E val=0x00 err=0
reg=0x2F val=0x00 err=0
reg=0x30 val=0x00 err=0
reg=0x31 val=0x00 err=0
Codec init DONE.
I2C ready
Start streaming
[00:00:57.901,627] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200070d8
[00:00:57.901,879] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200075d8
[00:00:57.902,125] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20007ad8
[00:00:57.902,371] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20007fd8
[00:00:57.902,617] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200084d8
[00:00:57.902,863] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200089d8
[00:00:57.903,108] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20008ed8
[00:00:57.903,354] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200093d8
[00:00:57.903,600] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200098d8
[00:00:57.903,846] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20009dd8
[00:00:57.904,088] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000a2d8
[00:00:57.904,329] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000a7d8
[00:00:57.904,571] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000acd8
[00:00:57.904,813] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000b1d8
[00:00:57.905,056] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000b6d8
[00:00:57.905,296] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000bbd8
[00:00:57.910,548] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000c0d8
[00:00:57.910,794] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000c5d8
[00:00:57.911,039] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000cad8
[00:00:57.911,284] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000cfd8
[00:00:57.911,530] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000d4d8
[00:00:57.911,775] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000d9d8
[00:00:57.912,020] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000ded8
[00:00:57.912,260] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000e3d8
[00:00:57.912,503] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000e8d8
[00:00:57.912,745] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000edd8
[00:00:57.912,987] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000f2d8
[00:00:57.913,229] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000f7d8
[00:00:57.913,472] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x2000fcd8
[00:00:57.913,714] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200101d8
[00:00:57.915,093] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200106d8
[00:00:57.915,345] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20010bd8
[00:00:57.917,878] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200075d8/(nil)
[00:00:57.918,128] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200110d8
[00:00:57.918,376] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200115d8
[00:00:57.956,506] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200070d8
[00:00:57.956,745] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20007ad8/(nil)
[00:00:57.956,987] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20011ad8
[00:00:57.995,254] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200075d8
[00:00:57.995,494] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20007fd8/(nil)
[00:00:57.995,736] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20011d58
[00:00:58.034,005] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20007ad8
[00:00:58.034,239] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200084d8/(nil)
[00:00:58.034,479] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20011fd8
[00:00:58.072,754] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20007fd8
[00:00:58.072,991] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200089d8/(nil)
[00:00:58.073,232] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20012258
[00:00:58.111,492] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200084d8
[00:00:58.111,731] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20008ed8/(nil)
[00:00:58.111,973] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200124d8
[00:00:58.150,232] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200089d8
[00:00:58.150,471] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200093d8/(nil)
[00:00:58.150,714] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20012758
[00:00:58.188,975] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20008ed8
[00:00:58.189,214] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200098d8/(nil)
[00:00:58.189,456] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200129d8
[00:00:58.227,723] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200093d8
[00:00:58.227,962] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20009dd8/(nil)
[00:00:58.228,203] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20012c58
[00:00:58.266,462] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200098d8
[00:00:58.266,701] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000a2d8/(nil)
[00:00:58.266,943] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20012ed8
[00:00:58.305,208] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20009dd8
[00:00:58.305,447] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000a7d8/(nil)
[00:00:58.305,689] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20013158
[00:00:58.343,961] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000a2d8
[00:00:58.344,201] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000acd8/(nil)
[00:00:58.344,443] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200133d8
[00:00:58.382,696] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000a7d8
[00:00:58.382,935] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000b1d8/(nil)
[00:00:58.383,176] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20013658
[00:00:58.421,452] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000acd8
[00:00:58.421,691] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000b6d8/(nil)
[00:00:58.421,933] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200138d8
[00:00:58.460,179] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000b1d8
[00:00:58.460,418] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000bbd8/(nil)
[00:00:58.460,660] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20013b58
[00:00:58.498,925] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000b6d8
[00:00:58.499,164] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000c0d8/(nil)
[00:00:58.499,407] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20013dd8
[00:00:58.537,681] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000bbd8
[00:00:58.537,920] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000c5d8/(nil)
[00:00:58.538,162] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014058
[00:00:58.576,416] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000c0d8
[00:00:58.576,655] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000cad8/(nil)
[00:00:58.576,897] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200142d8
[00:00:58.615,145] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000c5d8
[00:00:58.615,384] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000cfd8/(nil)
[00:00:58.615,626] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014558
[00:00:58.653,890] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000cad8
[00:00:58.654,130] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000d4d8/(nil)
[00:00:58.654,372] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200147d8
[00:00:58.692,641] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000cfd8
[00:00:58.692,880] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000d9d8/(nil)
[00:00:58.693,122] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014a58
[00:00:58.731,383] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000d4d8
[00:00:58.731,622] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000ded8/(nil)
[00:00:58.731,864] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014cd8
[00:00:58.770,132] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000d9d8
[00:00:58.770,371] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000e3d8/(nil)
[00:00:58.770,613] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014f58
[00:00:58.808,867] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000ded8
[00:00:58.809,106] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000e8d8/(nil)
[00:00:58.809,348] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200151d8
[00:00:58.847,617] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000e3d8
[00:00:58.847,856] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000edd8/(nil)
[00:00:58.848,098] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20015458
[00:00:58.886,361] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000e8d8
[00:00:58.886,600] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000f2d8/(nil)
[00:00:58.886,842] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200156d8
[00:00:58.925,104] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000edd8
[00:00:58.925,343] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000f7d8/(nil)
[00:00:58.925,585] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20015958
[00:00:58.963,850] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000f2d8
[00:00:58.964,089] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x2000fcd8/(nil)
[00:00:58.964,330] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20015bd8
[00:00:59.002,598] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000f7d8
[00:00:59.002,834] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200101d8/(nil)
[00:00:59.003,072] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20015e58
[00:00:59.041,348] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x2000fcd8
[00:00:59.041,585] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200106d8/(nil)
[00:00:59.041,826] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200160d8
[00:00:59.080,086] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200101d8
[00:00:59.080,322] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20010bd8/(nil)
[00:00:59.080,563] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016358
[00:00:59.118,832] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200106d8
[00:00:59.119,071] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200110d8/(nil)
[00:00:59.119,312] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200165d8
[00:00:59.157,573] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20010bd8
[00:00:59.157,813] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200115d8/(nil)
[00:00:59.158,053] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016858
[00:00:59.196,325] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200110d8
[00:00:59.196,564] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20011ad8/(nil)
[00:00:59.196,806] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016ad8
[00:00:59.235,075] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200115d8
[00:00:59.235,313] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20011d58/(nil)
[00:00:59.235,555] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016d58
[00:00:59.273,823] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20011ad8
[00:00:59.274,062] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20011fd8/(nil)
[00:00:59.274,303] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016fd8
[00:00:59.312,558] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20011d58
[00:00:59.312,798] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20012258/(nil)
[00:00:59.313,038] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017258
[00:00:59.351,307] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20011fd8
[00:00:59.351,547] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200124d8/(nil)
[00:00:59.351,789] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200174d8
[00:00:59.390,061] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20012258
[00:00:59.390,298] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20012758/(nil)
[00:00:59.390,540] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017758
[00:00:59.428,801] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200124d8
[00:00:59.429,040] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200129d8/(nil)
[00:00:59.429,280] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200179d8
[00:00:59.467,543] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20012758
[00:00:59.467,782] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20012c58/(nil)
[00:00:59.468,022] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017c58
[00:00:59.506,290] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200129d8
[00:00:59.506,529] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20012ed8/(nil)
[00:00:59.506,771] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017ed8
[00:00:59.545,040] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20012c58
[00:00:59.545,277] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20013158/(nil)
[00:00:59.545,519] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018158
[00:00:59.583,792] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20012ed8
[00:00:59.584,031] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200133d8/(nil)
[00:00:59.584,272] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200183d8
[00:00:59.622,542] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20013158
[00:00:59.622,781] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20013658/(nil)
[00:00:59.623,022] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018658
[00:00:59.661,292] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200133d8
[00:00:59.661,532] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200138d8/(nil)
[00:00:59.661,774] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200188d8
[00:00:59.700,025] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20013658
[00:00:59.700,263] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20013b58/(nil)
[00:00:59.700,505] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018b58
[00:00:59.738,778] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200138d8
[00:00:59.739,017] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20013dd8/(nil)
[00:00:59.739,258] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018dd8
[00:00:59.777,532] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20013b58
[00:00:59.777,771] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014058/(nil)
[00:00:59.778,011] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20019058
[00:00:59.816,264] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20013dd8
[00:00:59.816,504] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200142d8/(nil)
[00:00:59.816,746] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200192d8
[00:00:59.855,016] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014058
[00:00:59.855,254] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014558/(nil)
[00:00:59.855,496] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20019558
[00:00:59.893,765] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200142d8
[00:00:59.894,005] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200147d8/(nil)
[00:00:59.894,244] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x200197d8
[00:00:59.932,511] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014558
[00:00:59.932,733] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014a58/(nil)
[00:00:59.932,982] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014558
[00:00:59.971,260] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200147d8
[00:00:59.971,481] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014cd8/(nil)
[00:01:00.010,009] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014a58
[00:01:00.010,225] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014f58/(nil)
[00:01:00.010,473] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014a58
[00:01:00.048,753] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014cd8
[00:01:00.048,971] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200151d8/(nil)
[00:01:00.087,485] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014f58
[00:01:00.087,704] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20015458/(nil)
[00:01:00.087,952] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014f58
[00:01:00.126,226] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200151d8
[00:01:00.126,443] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200156d8/(nil)
[00:01:00.164,966] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20015458
[00:01:00.165,187] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20015958/(nil)
[00:01:00.165,436] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20015458
[00:01:00.203,711] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200156d8
[00:01:00.203,930] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20015bd8/(nil)
[00:01:00.242,463] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20015958
[00:01:00.242,683] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20015e58/(nil)
[00:01:00.242,933] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20015958
[00:01:00.281,199] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20015bd8
[00:01:00.281,418] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200160d8/(nil)
[00:01:00.319,952] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20015e58
[00:01:00.320,173] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016358/(nil)
[00:01:00.320,422] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20015e58
[00:01:00.358,690] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200160d8
[00:01:00.358,909] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200165d8/(nil)
[00:01:00.397,434] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016358
[00:01:00.397,654] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016858/(nil)
[00:01:00.397,903] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016358
[00:01:00.436,184] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200165d8
[00:01:00.436,404] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016ad8/(nil)
[00:01:00.474,921] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016858
[00:01:00.475,142] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016d58/(nil)
[00:01:00.475,390] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016858
[00:01:00.513,665] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016ad8
[00:01:00.513,884] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016fd8/(nil)
[00:01:00.552,415] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016d58
[00:01:00.552,635] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017258/(nil)
[00:01:00.552,884] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016d58
[00:01:00.591,152] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016fd8
[00:01:00.591,372] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200174d8/(nil)
[00:01:00.629,902] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017258
[00:01:00.630,123] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017758/(nil)
[00:01:00.630,372] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017258
[00:01:00.668,649] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200174d8
[00:01:00.668,868] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200179d8/(nil)
[00:01:00.707,375] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017758
[00:01:00.707,596] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017c58/(nil)
[00:01:00.707,845] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017758
[00:01:00.746,123] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200179d8
[00:01:00.746,343] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017ed8/(nil)
[00:01:00.784,872] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017c58
[00:01:00.785,093] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018158/(nil)
[00:01:00.785,340] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017c58
[00:01:00.823,609] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017ed8
[00:01:00.823,828] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200183d8/(nil)
[00:01:00.862,354] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018158
[00:01:00.862,573] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018658/(nil)
[00:01:00.862,818] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018158
[00:01:00.901,099] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200183d8
[00:01:00.901,317] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200188d8/(nil)
[00:01:00.939,843] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018658
[00:01:00.940,064] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018b58/(nil)
[00:01:00.940,312] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018658
[00:01:00.978,577] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200188d8
[00:01:00.978,797] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018dd8/(nil)
[00:01:01.017,323] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018b58
[00:01:01.017,542] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20019058/(nil)
[00:01:01.017,789] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018b58
[00:01:01.056,062] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018dd8
[00:01:01.056,279] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200192d8/(nil)
[00:01:01.094,804] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20019058
[00:01:01.095,023] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20019558/(nil)
[00:01:01.095,269] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20019058
[00:01:01.133,534] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200192d8
[00:01:01.133,754] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x200197d8/(nil)
[00:01:01.172,281] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20019558
[00:01:01.172,502] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014558/(nil)
[00:01:01.172,751] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20019558
[00:01:01.211,035] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x200197d8
[00:01:01.211,253] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014a58/(nil)
[00:01:01.249,772] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014558
[00:01:01.249,993] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014f58/(nil)
[00:01:01.250,242] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014558
[00:01:01.288,503] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014a58
[00:01:01.288,723] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20015458/(nil)
[00:01:01.327,239] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014f58
[00:01:01.327,459] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20015958/(nil)
[00:01:01.327,708] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014f58
[00:01:01.365,986] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20015458
[00:01:01.366,205] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20015e58/(nil)
[00:01:01.404,729] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20015958
[00:01:01.404,949] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016358/(nil)
[00:01:01.405,194] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20015958
[00:01:01.443,473] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20015e58
[00:01:01.443,693] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016858/(nil)
[00:01:01.482,225] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016358
[00:01:01.482,445] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016d58/(nil)
[00:01:01.482,694] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016358
[00:01:01.520,955] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016858
[00:01:01.521,175] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017258/(nil)
[00:01:01.559,692] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016d58
[00:01:01.559,913] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017758/(nil)
[00:01:01.560,162] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016d58
[00:01:01.598,436] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017258
[00:01:01.598,655] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017c58/(nil)
[00:01:01.637,174] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017758
[00:01:01.637,395] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018158/(nil)
[00:01:01.637,644] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017758
[00:01:01.675,895] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017c58
[00:01:01.676,114] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018658/(nil)
[00:01:01.714,640] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018158
[00:01:01.714,860] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018b58/(nil)
[00:01:01.715,110] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018158
[00:01:01.753,381] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018658
[00:01:01.753,600] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20019058/(nil)
[00:01:01.792,113] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018b58
[00:01:01.792,333] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20019558/(nil)
[00:01:01.792,582] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018b58
[00:01:01.830,857] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20019058
[00:01:01.831,077] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014558/(nil)
[00:01:01.869,600] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20019558
[00:01:01.869,821] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014f58/(nil)
[00:01:01.870,070] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20019558
[00:01:01.908,347] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014558
[00:01:01.908,566] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20015958/(nil)
[00:01:01.947,091] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014f58
[00:01:01.947,310] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016358/(nil)
[00:01:01.947,557] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014f58
[00:01:01.985,843] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20015958
[00:01:01.986,063] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016d58/(nil)
[00:01:02.024,583] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016358
[00:01:02.024,802] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017758/(nil)
[00:01:02.025,049] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20016358
[00:01:02.063,322] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016d58
[00:01:02.063,540] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018158/(nil)
[00:01:02.102,054] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017758
[00:01:02.102,273] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018b58/(nil)
[00:01:02.102,522] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017758
[00:01:02.140,788] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018158
[00:01:02.141,005] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20019558/(nil)
[00:01:02.179,524] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018b58
[00:01:02.179,745] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014f58/(nil)
[00:01:02.179,994] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20018b58
[00:01:02.218,278] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20019558
[00:01:02.218,497] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20016358/(nil)
[00:01:02.257,021] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014f58
[00:01:02.257,240] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017758/(nil)
[00:01:02.257,489] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014f58
[00:01:02.295,764] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20016358
[00:01:02.295,984] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20018b58/(nil)
[00:01:02.334,504] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017758
[00:01:02.334,724] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014f58/(nil)
[00:01:02.334,973] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20017758
[00:01:02.373,246] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20018b58
[00:01:02.373,466] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20017758/(nil)
[00:01:02.411,976] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014f58
[00:01:02.412,211] <dbg> i2s_nrfx: i2s_nrfx_write: Queued TX 0x20014f58
[00:01:02.412,422] <dbg> i2s_nrfx: i2s_nrfx_write: Next TX 0x20014f58
[00:01:02.412,628] <dbg> i2s_nrfx: supply_next_buffers: Next buffers: 0x20014f58/(nil)
[00:01:02.450,719] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20017758
[00:01:02.489,453] <err> i2s_nrfx: Next buffers not supplied on time
[00:01:02.489,670] <dbg> i2s_nrfx: free_tx_buffer: Freed TX 0x20014f58
[00:01:02.489,913] <err> i2s_nrfx: Cannot write in state: 4


i dont know what issue had in my current code please give answer sir .

I not hear sine sound using this code why ??


i share my proj.config and overlay below 


CONFIG_GPIO=y
CONFIG_PRINTK=y
CONFIG_SERIAL=y
CONFIG_LOG=y
CONFIG_LOG_DEFAULT_LEVEL=3
CONFIG_GPIO=y
CONFIG_I2C=y
CONFIG_I2S=y
CONFIG_MINIMAL_LIBC=y
CONFIG_I2C_NRFX=y
CONFIG_PWM=y
CONFIG_PWM_NRFX=y

CONFIG_PRINTK=y
CONFIG_LOG=y

CONFIG_USE_SEGGER_RTT=y
CONFIG_LOG_BACKEND_RTT=y

CONFIG_LOG_BACKEND_UART=n
CONFIG_UART_CONSOLE=n

CONFIG_LOG_MODE_IMMEDIATE=y

CONFIG_MAIN_STACK_SIZE=4096
CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=2048

CONFIG_PM=n
CONFIG_PM_DEVICE=n
CONFIG_PM_DEVICE_RUNTIME=n

# --- I2S DMA memory ---
CONFIG_I2S=y
CONFIG_I2S_NRFX=y

CONFIG_I2S_TX_BLOCK_COUNT=4

# --- No-cache memory for DMA ---
CONFIG_NOCACHE_MEMORY=y

CONFIG_HEAP_MEM_POOL_SIZE=16384

# I2S
CONFIG_I2S=y
CONFIG_I2S_NRFX=y

# Non-cache RAM for DMA (REQUIRED on nRF54)
CONFIG_NOCACHE_MEMORY=y


CONFIG_DEBUG_OPTIMIZATIONS=y
CONFIG_ASSERT=y
CONFIG_FAULT_DUMP=2

CONFIG_I2S_NRFX_TX_BLOCK_COUNT=32
CONFIG_I2S_NRFX_RX_BLOCK_COUNT=0

CONFIG_I2S_LOG_LEVEL_DBG=y
CONFIG_LOG=y

RE: I2C read failed reg 0x00 err -5

Syed Maysum Abbas Zaidi — Fri, 02 Jan 2026 09:45:04 GMT

Hi,

The -11 return value corresponds to -EAGAIN and indicates that the I2S TX queue is full and the operation timed out. This occurs when the application submits audio blocks faster than the I2S hardware can transmit them.

Increasing NUM_BLOCKS (for example to 8) is the recommended first step to provide additional buffering. If the issue still occurs, you may also increase the .timeout value in your i2s_config to allow i2s_write() more time to wait for a free TX slot. Please confirm if it works. Thanks

Best Regards,
Syed Maysum

RE: I2C read failed reg 0x00 err -5

Sharon123 — Wed, 31 Dec 2025 05:11:29 GMT

my overlay file is this ,

&pinctrl {

i2c21_default: i2c22_default {

group1 {

psels =

<NRF_PSEL(TWIM_SCL, 1, 12)>,

<NRF_PSEL(TWIM_SDA, 1, 13)>;

bias-pull-up;

};

i2c21_sleep: i2c22_sleep {

group1 {

psels = <NRF_PSEL(TWIM_SCL, 1,12)>,

<NRF_PSEL(TWIM_SDA, 1, 13)>;

low-power-enable;

};

i2s20_default: i2s20_default {

group1 {

psels = <NRF_PSEL(I2S_SDIN, 1, 6)>,

<NRF_PSEL(I2S_SDOUT, 1, 5)>,

<NRF_PSEL(I2S_SCK_S, 1, 3)>,

<NRF_PSEL(I2S_MCK, 1, 4)>,

<NRF_PSEL(I2S_LRCK_M, 1, 14)>;

};

i2s20_sleep: i2s20_sleep {

group1 {

psels = <NRF_PSEL(I2S_SDIN, 1, 6)>,

<NRF_PSEL(I2S_SDOUT, 1, 5)>,

<NRF_PSEL(I2S_SCK_S, 1, 3)>,

<NRF_PSEL(I2S_MCK, 1, 4)>,

<NRF_PSEL(I2S_LRCK_M, 1, 14)>;

};

// i2s20_default: i2s20_default

};

&i2c21 {

status = "disabled";

pinctrl-0 = <&i2c22_default>;

pinctrl-1 = <&i2c22_sleep>;

pinctrl-names = "default", "sleep";

audiocodec: audiocodec@18 {

compatible = "i2c-device";

status = "okay";

reg = < 0x18 >;

};

&i2s20 {

status = "okay";

pinctrl-0 = <&i2s20_default>;

pinctrl-1 = <&i2s20_sleep>;

pinctrl-names = "default", "sleep";

};

&led0 {status = "disabled";};

/ {

custom_pins{

compatible = "gpio-keys";

codec_reset: codec-reset-node {

gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;

label = "Codec Reset Pin";

};

&i2c30 {

status = "disabled";

};

/delete-node/ &{/pin-controller/i2c22_default/group2/};

/delete-node/ &{/pin-controller/i2s20_default/group5/};

/delete-node/ &{/pin-controller/i2s20_default/group2/};

/delete-node/ &{/pin-controller/i2s20_default/group3/};

/delete-node/ &{/pin-controller/i2s20_default/group4/};

&i2c21 {

status = "okay";

};

&i2c22 {

status = "disabled";

};

&uart21 {

status = "disabled";

};

/delete-node/ &button0;

/delete-node/ &{/buttons/};

/ {

button0: button_0 {

compatible = "gpio-keys";

button0_key: button0_key {

gpios = <&gpio1 15 0>;

label = "MCUBoot Button";

};

// led0: led_0 {

// compatible = "gpio-leds";

// led0_green: led0_green {

// gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;

// label = "MCUBoot LED";

// };

};

&uart20 {

status = "okay";

};

&uart20_default {

group1 {

psels = <NRF_PSEL(UART_TX, 1, 8)>, <NRF_PSEL(UART_RX, 1, 7)>;

};

RE: I2C read failed reg 0x00 err -5

Sharon123 — Wed, 31 Dec 2025 05:11:00 GMT

* SPDX-License-Identifier: Apache-2.0

#include <zephyr/kernel.h>

#include <zephyr/device.h>

#include <zephyr/drivers/i2s.h>

#include <zephyr/drivers/gpio.h>

#include <stdio.h>

#include "codec_header.h"

#define SAMPLE_NO 64

#define CHANNELS 2

#define NUM_BLOCKS 4

/* BLOCK_SIZE in bytes */

#define BLOCK_SIZE (CHANNELS * SAMPLE_NO * sizeof(int16_t))

const struct device *dev_i2s = DEVICE_DT_GET(DT_NODELABEL(i2s20));

/* Stereo interleaved buffers */

static int16_t tx_block[NUM_BLOCKS][CHANNELS * SAMPLE_NO];

/* Sine wave table */

static const int16_t sine[SAMPLE_NO] = {

3211, 6392, 9511, 12539, 15446, 18204, 20787, 23169,

25329, 27244, 28897, 30272, 31356, 32137, 32609, 32767,

32609, 32137, 31356, 30272, 28897, 27244, 25329, 23169,

20787, 18204, 15446, 12539, 9511, 6392, 3211, 0,

-3212, -6393, -9512,-12540,-15447,-18205,-20788,-23170,

-25330,-27245,-28898,-30273,-31357,-32138,-32610,-32767,

-32610,-32138,-31357,-30273,-28898,-27245,-25330,-23170,

-20788,-18205,-15447,-12540, -9512, -6393, -3212, -1

};

static void fill_buf(int16_t *buf, int shift)

{

for (int i = 0; i < SAMPLE_NO; i++) {

buf[2 * i] = sine[i] >> shift; /* Left */

buf[2 * i + 1] = sine[(i + SAMPLE_NO / 4) % SAMPLE_NO] >> shift; /* Right */

}

int main(void)

{

struct i2s_config i2s_cfg;

int ret;

printk("=== System start ===\n");

// POWER-UP DELAY

k_msleep(300);

// INIT I2C

ret = i2c_init_codec();

if (ret)

{

printk("Codec I2C init failed (%d). STOP.\n", ret);

while (1)

{

k_sleep(K_FOREVER);

}

printk("Codec I2C init OK\n");

// CHECK I2S DEVICE

if (!device_is_ready(dev_i2s)) {

printk("I2S device not ready\n");

return -ENODEV;

}

// CONFIGURE I2S

memset(&i2s_cfg, 0, sizeof(i2s_cfg));

i2s_cfg.word_size = 16;

i2s_cfg.channels = CHANNELS;

i2s_cfg.format = I2S_FMT_DATA_FORMAT_I2S;

i2s_cfg.frame_clk_freq = 8000;

i2s_cfg.block_size = BLOCK_SIZE;

i2s_cfg.timeout =1000;

i2s_cfg.options = I2S_OPT_FRAME_CLK_MASTER | I2S_OPT_BIT_CLK_MASTER;

ret = i2s_configure(dev_i2s, I2S_DIR_TX, &i2s_cfg);

if (ret)

{

printk("I2S configure failed (%d)\n", ret);

return ret;

}

printk("I2S configured.........\n");

// PREPARE AUDIO BUFFERS

for (int i = 0; i < NUM_BLOCKS; i++)

{

fill_buf(tx_block[i], i % 3);

}

// QUEUE BUFFERS BEFORE START

ret = i2s_write(dev_i2s, tx_block[0], BLOCK_SIZE);

ret |= i2s_write(dev_i2s, tx_block[1], BLOCK_SIZE);

if (ret)

{

printk("I2S write failed (%d)\n", ret);

return ret;

}

printk("Initial TX buffers queued\n");

// NOW START I2S -lrck

ret = i2s_trigger(dev_i2s, I2S_DIR_TX, I2S_TRIGGER_START);

if (ret)

{

printk("I2S start failed (%d)\n", ret);

return ret;

}

printk("I2S started successfully\n");

// remaining buffer

int idx = 2;

while (1)

{

ret = i2s_write(dev_i2s, tx_block[idx % NUM_BLOCKS], BLOCK_SIZE);

if (ret == 0)

{

idx++;

k_msleep(1);

}

else if (ret == -EAGAIN)

{

k_msleep(2);

}

else

{

printk("I2S write error (%d)\n", ret);

break;

}

printk("i2s_write.............");

return 0;

}

RE: I2C read failed reg 0x00 err -5

Sharon123 — Wed, 31 Dec 2025 05:10:27 GMT

i have another issue in my code , when i read i2s 1 to 5 index is properly transmitted after enter to index 6 leads to -11 error

RE: I2C read failed reg 0x00 err -5

Sharon123 — Wed, 31 Dec 2025 05:08:54 GMT

RE: I2C read failed reg 0x00 err -5

Syed Maysum Abbas Zaidi — Thu, 25 Dec 2025 16:42:16 GMT

Hi,

Since the issue only appears when I2S is active, it may be related to marginal I2C signal integrity. Could you try enabling internal pull-ups on the I2C pins by adding bias-pull-up to the i2c22_default pinctrl node, and check if the behavior changes. You could trying adding this to the overlay:

i2c22_default: i2c22_default {
    group1 {
        psels =
            <NRF_PSEL(TWIM_SCL, 1, 11)>,
            <NRF_PSEL(TWIM_SDA, 1, 12)>;
        bias-pull-up;
    };
};

Best Regards,
Syed Maysum

RE: I2C read failed reg 0x00 err -5

Sharon123 — Tue, 23 Dec 2025 04:42:58 GMT

&pinctrl {

i2c22_default: i2c22_default {

group1 {

psels =

<NRF_PSEL(TWIM_SCL, 1, 11)>,

<NRF_PSEL(TWIM_SDA, 1, 12)>;

};

i2c22_sleep: i2c22_sleep {

group1 {

psels = <NRF_PSEL(TWIM_SCL, 1,11)>,

<NRF_PSEL(TWIM_SDA, 1, 12)>;

low-power-enable;

};

i2s20_default: i2s20_default {

group1 {

psels = <NRF_PSEL(I2S_SDIN, 1, 4)>,

<NRF_PSEL(I2S_SDOUT, 1, 5)>,

<NRF_PSEL(I2S_SCK_S, 1, 6)>,

<NRF_PSEL(I2S_MCK, 1, 13)>,

<NRF_PSEL(I2S_LRCK_M, 1, 14)>;

};

i2s20_sleep: i2s20_sleep {

group1 {

psels = <NRF_PSEL(I2S_SDIN, 1, 4)>,

<NRF_PSEL(I2S_SDOUT, 1, 5)>,

<NRF_PSEL(I2S_SCK_S, 1, 6)>,

<NRF_PSEL(I2S_MCK, 1, 13)>,

<NRF_PSEL(I2S_LRCK_M, 1, 14)>;

};

&i2c22 {

status = "okay";

pinctrl-0 = <&i2c22_default>;

pinctrl-1 = <&i2c22_sleep>;

pinctrl-names = "default", "sleep";

audiocodec: audiocodec@18 {

compatible = "i2c-device";

status = "okay";

reg = < 0x18 >;

};

&i2s20 {

status = "okay";

pinctrl-0 = <&i2s20_default>;

pinctrl-1 = <&i2s20_sleep>;

pinctrl-names = "default", "sleep";

};

&led0 {status = "disabled";};

/ {

custom_pins{

compatible = "gpio-keys";

codec_reset: codec-reset-node {

gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;

label = "Codec Reset Pin";

};

&i2c30 {

status = "disabled";

};

/delete-node/ &{/pin-controller/i2c22_default/group2/};

/delete-node/ &{/pin-controller/i2s20_default/group5/};

/delete-node/ &{/pin-controller/i2s20_default/group2/};

/delete-node/ &{/pin-controller/i2s20_default/group3/};

/delete-node/ &{/pin-controller/i2s20_default/group4/};

// &button0 {

// /delete-property/ gpios;

// };

RE: I2C read failed reg 0x00 err -5

Sharon123 — Tue, 23 Dec 2025 04:42:30 GMT

hi ,

when i am connect i2s ans i2c together is gettimg -5 i2c error . without i2s , i2c register read is proper ??

RE: I2C read failed reg 0x00 err -5

Sharon123 — Thu, 18 Dec 2025 10:02:50 GMT

thank you sir ,Resolved the issue .I close the ticket

RE: I2C read failed reg 0x00 err -5

Syed Maysum Abbas Zaidi — Wed, 17 Dec 2025 12:38:33 GMT

Hi,

You are using the TWIM22 I2C instance (&i2c22). On nRF54L15, TWIM20/21/22 can only be routed to GPIOs on port P1 (see the Block Diagram). P2 pins are not supported for TWIM, so using P2.06/P2.07 with &i2c22 will typically result in errors.

You may try updating the devicetree so that TWIM20/21/22 use P1.xx pins (GPIO port 1), or alternatively switch to TWIM30 (&i2c30) if you want to use P0.xx pins (GPIO port 0).

Kind Regards,
Syed Maysum

RE: I2C read failed reg 0x00 err -5

Sharon123 — Wed, 17 Dec 2025 11:49:06 GMT

i am using codec - TLV320AIC3111

RE: I2C read failed reg 0x00 err -5

Sharon123 — Wed, 17 Dec 2025 02:34:51 GMT

k_sem_take(&dev_data->completion_sync, I2C_TRANSFER_TIMEOUT_MSEC); i got here -11

RE: I2C read failed reg 0x00 err -5

Sharon123 — Tue, 16 Dec 2025 13:14:16 GMT

and as you can see, there are several possible routes to return -EIO. Either k_sem_take(&dev_data->completion_sync, I2C_TRANSFER_TIMEOUT_MSEC); returned an error, or dev_data->res != NRFX_SUCCESS, or possibly i2c_nrfx_twim_msg_transfer() returned -EIO.