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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF5340 I2C driving strength tuning</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/126310/nrf5340-i2c-driving-strength-tuning</link><description>Hi 
 We measure I2C SCL falling time is 5.87ns, little faster than spec. 6.54ns ( 20*1.8/5.5) 
 We use PIN_CNF[n] (Address offset: 0x200 + (n &amp;#215; 0x4)) ID D drive to tune, but it only have standard and high drive, the default is standard, we tune to high</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 30 Dec 2025 15:22:27 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/126310/nrf5340-i2c-driving-strength-tuning" /><item><title>RE: nRF5340 I2C driving strength tuning</title><link>https://devzone.nordicsemi.com/thread/557746?ContentTypeID=1</link><pubDate>Tue, 30 Dec 2025 15:22:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:53981b24-93de-4585-8145-2d5c249168ba</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Usually using smaller pull up resistors or add some capacitance can do the trick. Though I was not aware there was also a requirement that fall times must be larger than a minimum value, I was only aware there were some max values that is must be lower than.&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 I2C driving strength tuning</title><link>https://devzone.nordicsemi.com/thread/557707?ContentTypeID=1</link><pubDate>Tue, 30 Dec 2025 01:51:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d1c29b90-5b8c-4d73-9cc0-066b310fd448</guid><dc:creator>Poki Huang</dc:creator><description>&lt;p&gt;Hi Kenneth:&lt;/p&gt;
&lt;p&gt;Sorry for confuse&lt;/p&gt;
&lt;p&gt;I mean&amp;nbsp;&lt;span&gt;I2C SCL falling time is&amp;nbsp; 5.87ns, little&amp;nbsp;shorter than spec. 6.54ns (&lt;/span&gt;&lt;span&gt;20*1.8/5.5)&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;This measurement is by standard drive setting, and high drive setting will cause the falling time shorter, but I need this timing&amp;nbsp;longer than 6.54ns, not use more stronger drive like extra high drive&lt;/p&gt;
&lt;p&gt;So I want to know if any other register can tune I2C SCL drive more weak to let SCL falling longer&lt;/p&gt;
&lt;p&gt;Thank you&lt;/p&gt;
&lt;p&gt;Poki&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF5340 I2C driving strength tuning</title><link>https://devzone.nordicsemi.com/thread/557668?ContentTypeID=1</link><pubDate>Mon, 29 Dec 2025 12:54:10 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8437fde3-6d4d-4a41-a789-61e6adb0aa4a</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Some pins also have extra high drive, ref:&amp;nbsp;&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf5340/page/chapters/pin.html"&gt;https://docs.nordicsemi.com/bundle/ps_nrf5340/page/chapters/pin.html&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>