https://devzone.nordicsemi.com/f/nordic-q-a/126649/tdm-master-mode-not-able-to-div-to-16-khzTrying to config TDM SCK for: Master, 4 channels, 24 or 32 bits, 16 KHz...doing the math yields 1.536 or 2.048 MHz for SCK. I have 24 MHz or 32 MHz available as possible clock sources. None of the DIV values give an integer matching my needs. 16 KHz isen-USTelligent Community 13Wed, 21 Jan 2026 20:20:59 GMThttps://devzone.nordicsemi.com/thread/559313?ContentTypeID=1Wed, 21 Jan 2026 20:20:59 GMT137ad170-7792-4731-bb38-c0d22fbe4515:a542f93c-5997-4cd8-ae27-b157c9775a60Turbo J<p>Its a limitation since only the 32MHz clock source is available.Some bigger NRF chips have a dedicated audio PLL that can generate the required master clock source signal.</p> <p>If your application can&#39;t tolerate a 2.000MHz SCK (instead of 2.048MHz), use a codec chip with a PLL and run the TDM in slave mode.</p><div style="clear:both;"></div>https://devzone.nordicsemi.com/thread/559312?ContentTypeID=1Wed, 21 Jan 2026 20:13:06 GMT137ad170-7792-4731-bb38-c0d22fbe4515:a6f8d512-4b60-4407-80bf-fdfda95c6f74Chris Nielsen<p>Update.&nbsp; I suppose if true master operation is not possible for 16 KHz, then my backup plan would be to have the nRF TDM output some rather arbitrary MCLK, set nRF TDM slave mode, and let my ADC run in master mode? (using its PLL to generate my 16 KHz clocks)</p><div style="clear:both;"></div>