RE: nRF Connect Can't Communicate Properly with CY15B108QN FRAM Infineon

Kazi Afroza Sultana — Mon, 09 Feb 2026 11:24:26 GMT

[quote user="zuhdalfan"]nordic,drive-mode = <NRF_DRIVE_H0H1>;[/quote]

Hello Zuhdi,

Thanks for letting me know.

Adding this in the device tree

nordic,drive-mode = <NRF_DRIVE_H0H1>;

resolved the communication issue with the CY15B108QN FRAM on nRF52840. It seems the root cause was very likely related to the default GPIO drive strength (SOS1 provides lower output device current) used by the nRF device. FRAM is a high speed (SPI clock up to 40 MHz) external SPIM devices so it can reduce timing margin and leads to sample incorrect data.

Did you try the default SPI3 pins mentioned in our board file?

RE: nRF Connect Can't Communicate Properly with CY15B108QN FRAM Infineon

zuhdalfan — Sat, 07 Feb 2026 05:47:35 GMT

This issue has been solved.

I only need to add this to the pinctrl:

nordic,drive-mode = <NRF_DRIVE_H0H1>;

RE: nRF Connect Can't Communicate Properly with CY15B108QN FRAM Infineon

zuhdalfan — Wed, 04 Feb 2026 02:57:22 GMT

Hi, I hope you are doing well,

just add a comparison when I use ESP32 with ESP-IDF. Just using simple SPI master:

#include <stdio.h>

#include "driver/spi_master.h"
#include "driver/gpio.h"
#include "esp_log.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"

#define PIN_NUM_MISO 19
#define PIN_NUM_MOSI 23
#define PIN_NUM_CLK 18
#define PIN_NUM_CS 5
#define PIN_NUM_WP 22

#define RDID_CMD 0x9F

static const char *TAG = "fram_rdid";

static void log_help(void)
{
    ESP_LOGI(TAG, "CY15B108QN RDID test over VSPI");
    ESP_LOGI(TAG, "Pins: SCK=GPIO%d MISO=GPIO%d MOSI=GPIO%d CS=GPIO%d",
             PIN_NUM_CLK, PIN_NUM_MISO, PIN_NUM_MOSI, PIN_NUM_CS);
    ESP_LOGI(TAG, "WP pin: GPIO%d (held high)", PIN_NUM_WP);
    ESP_LOGI(TAG, "SPI mode 0, ~2 MHz, full duplex");
    ESP_LOGI(TAG, "RDID command 0x%02X, expect 3 bytes: [Manufacturer, Product MSB, Product LSB]",
             RDID_CMD);
}

static esp_err_t fram_read_rdid(spi_device_handle_t dev, uint8_t rdid[3])
{
    uint8_t tx_data[4] = { RDID_CMD, 0x00, 0x00, 0x00 };
    uint8_t rx_data[4] = { 0 };
    spi_transaction_t t = { 0 };

    t.length = 8 * sizeof(tx_data);
    t.tx_buffer = tx_data;
    t.rx_buffer = rx_data;

    esp_err_t err = spi_device_transmit(dev, &t);
    if (err != ESP_OK) {
        return err;
    }

    rdid[0] = rx_data[1];
    rdid[1] = rx_data[2];
    rdid[2] = rx_data[3];
    return ESP_OK;
}

void app_main(void)
{
    log_help();

    gpio_config_t wp_cfg = {
        .pin_bit_mask = 1ULL << PIN_NUM_WP,
        .mode = GPIO_MODE_OUTPUT,
        .pull_up_en = GPIO_PULLUP_DISABLE,
        .pull_down_en = GPIO_PULLDOWN_DISABLE,
        .intr_type = GPIO_INTR_DISABLE
    };
    ESP_ERROR_CHECK(gpio_config(&wp_cfg));
    ESP_ERROR_CHECK(gpio_set_level(PIN_NUM_WP, 1));

    spi_bus_config_t buscfg = {
        .miso_io_num = PIN_NUM_MISO,
        .mosi_io_num = PIN_NUM_MOSI,
        .sclk_io_num = PIN_NUM_CLK,
        .quadwp_io_num = -1,
        .quadhd_io_num = -1,
        .max_transfer_sz = 4
    };

    spi_device_interface_config_t devcfg = {
        .clock_speed_hz = 2 * 1000 * 1000,
        .mode = 0,
        .spics_io_num = PIN_NUM_CS,
        .queue_size = 1
    };

    ESP_ERROR_CHECK(spi_bus_initialize(SPI3_HOST, &buscfg, SPI_DMA_CH_AUTO));

    spi_device_handle_t dev = NULL;
    ESP_ERROR_CHECK(spi_bus_add_device(SPI3_HOST, &devcfg, &dev));

    while (true) {
        uint8_t rdid[3] = { 0 };
        esp_err_t err = fram_read_rdid(dev, rdid);
        if (err == ESP_OK) {
            ESP_LOGI(TAG, "RDID: 0x%02X 0x%02X 0x%02X", rdid[0], rdid[1], rdid[2]);
        } else {
            ESP_LOGE(TAG, "RDID read failed: %s", esp_err_to_name(err));
        }
        vTaskDelay(pdMS_TO_TICKS(1000));
    }
}

The result is aligned with the CY15B108QN documentation:

I (339) main_task: Calling app_main()
I (339) fram_rdid: CY15B108QN RDID test over VSPI
I (339) fram_rdid: Pins: SCK=GPIO18 MISO=GPIO19 MOSI=GPIO23 CS=GPIO5
I (349) fram_rdid: WP pin: GPIO22 (held high)
I (359) fram_rdid: SPI mode 0, ~2 MHz, full duplex
I (359) fram_rdid: RDID command 0x9F, expect 3 bytes: [Manufacturer, Product MSB, Product LSB]
I (369) gpio: GPIO[22]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (379) fram_rdid: RDID: 0x03 0x2E 0xC2
I (1379) fram_rdid: RDID: 0x03 0x2E 0xC2
I (2379) fram_rdid: RDID: 0x03 0x2E 0xC2
I (3379) fram_rdid: RDID: 0x03 0x2E 0xC2
I (4379) fram_rdid: RDID: 0x03 0x2E 0xC2
I (5379) fram_rdid: RDID: 0x03 0x2E 0xC2
I (6379) fram_rdid: RDID: 0x03 0x2E 0xC2
I (7379) fram_rdid: RDID: 0x03 0x2E 0xC2

I have tried also using nRF52840DK (different board) with ZephyrRTOS again but using simple SPI master, it still got the same response as the image logic analyzer (does not align with FRAM documentation).

Please help :)

Thank you.

RE: nRF Connect Can't Communicate Properly with CY15B108QN FRAM Infineon

zuhdalfan — Thu, 29 Jan 2026 03:31:12 GMT

sure, please check this:

I shared the board overlay and FRAM driver I used. I haven't reach the write and read memory, just read the RDID only in the init function for testing. Because if RDID still have issue, the other functionality may also not working properly.

Do you have any idea whats going on?

devzone.nordicsemi.com/.../cy15b108qn.h

devzone.nordicsemi.com/.../cy15b108qn.c
devzone.nordicsemi.com/.../ubx_5F00_evkninab3_5F00_nrf52840.overlay

RE: nRF Connect Can't Communicate Properly with CY15B108QN FRAM Infineon

Kazi Afroza Sultana — Tue, 27 Jan 2026 14:48:17 GMT

Hello,

Can you share application file so I can look at the overlay file, main.c file?