nrf54l15 combine with nrf21540

RE: nrf54l15 combine with nrf21540

Ressa — Tue, 24 Feb 2026 15:13:49 GMT

Hi,
Can you share the documentation link to the mentioned statement?

RE: nrf54l15 combine with nrf21540

crm — Tue, 24 Feb 2026 01:33:44 GMT

I see it mentioned in the documentation that corresponding calibrations will be added to the power model when using SPI. Is this not applicable to standalone GPIO control?

RE: nrf54l15 combine with nrf21540

Ressa — Mon, 16 Feb 2026 12:05:52 GMT

Hi,

Regarding your questions:

1. Yes, when FEM is enabled, if the gain of FEM is 10 dB, and you select 10 dBm on DTM , then the output of nRF54L15 would be around 0 dBm. For the other question regarding nRF54L15 max output power, please check the datasheet, max output power is 8 dBm for CSP package and 7 dBm for QFN.

2. For GPIO‑mode nRF21540, mode-gpios is an optional device tree property that lets MPSL control the MODE pin automatically when runtime gain control is enabled.

If runtime gain control is disabled, the PA gain is constant and equal to CONFIG_MPSL_FEM_NRF21540_TX_GAIN_DB, and MODE can be at fixed state.

If you see the MODE pin always high and not changing even if CONFIG_MPSL_FEM_NRF21540_RUNTIME_PA_GAIN_CONTROL is enabled, then it means the requested antenna powers never require switching between POUTA and POUTB, so the driver keeps MODE in one state.

3. Regarding how these settings interact with each other:

Application / controller requests a TX power at the antenna and if FEM is enabled, MPSL FEM driver chooses which PA gain to use (POUTA or POUTB) based on the requested power and the configured gains, and then sets the SoC TX power so that SoC TX + FEM gain reaches to the requested antenna power.
Please note that the MODE pin is driven automatically by MPSL (for GPIO implementation) when runtime gain control is enabled and mode-gpios is present.
Also "CONFIG_MPSL_FEM_NRF21540_RX_GAIN_DB=13" is the gain for receiver side at FEM, it has nothing to do with TX gain and transmission power, it is for receiver side.

RE: nrf54l15 combine with nrf21540

crm — Sat, 14 Feb 2026 01:11:55 GMT

Thank you for your reply. I have a few more questions.

1、The TX power of nRF54L15 can be set to 10 dBm on the DTM app, but I checked that the maximum TX power of nRF54L15 is 8 dBm. So when FEM is enabled (0 dBm on DTM corresponds to -10 dBm output from nRF54L15), if I set 10 dBm on DTM, does it mean the output power of nRF54L15 will be 0 dBm?

2、I can switch the ANT pin selection via fem_antenna_select(), but how should I switch the MODE pin? I set mode-gpios=<&gpio1 12 GPIO_ACTIVE_LOW>; in the overlay file, but the pin is still at high level in practice.

3、Additionally, how are configurations like CONFIG_MPSL_FEM_NRF21540_TX_GAIN_DB=20, CONFIG_MPSL_FEM_NRF21540_RX_GAIN_DB=13, and CONFIG_MPSL_FEM_NRF21540_RUNTIME_PA_GAIN_CONTROL=y applied in the program? How do they work with the MODE pin? I have checked relevant documents but haven’t fully understood this part.

RE: nrf54l15 combine with nrf21540

Ressa — Fri, 13 Feb 2026 12:49:19 GMT

Hi,

[quote user="crm"]Why does adding the FEM reduce the transmit power, and what is the purpose of this?I set the TX power of the nRF54 to 0 dBm in the DTM app, but the output power via the nRF21540 is only -8 dBm. VDD 3.0V[/quote]

Because when FEM is enabled, the power you set is meant to be present at FEM output. So the power you set in DTM is equal to "SoC power + FEM gain", based on that if you set 0 dBm and the FEM gain is 10 dB , then the SoC output power would be -10 dBm. (FEM out = SoC power + FEM gain)
So it is doing what it is supposed to do.

Regarding the pins, tx-en-gpios, rx-en-gpios, and pdn-gpios are controlled automatically by the MPSL FEM driver when the nrf_radio_fem node and CONFIG_MPSL_FEM_NRF21540_GPIO are enabled. These pins are mandatory for GPIO mode operation.

Regarding the other two GPIOs, mode-gpios and ant-sel-gpios are optional pins. They are also managed by the FEM driver according to the configured gain and antenna selection logic.

If you enable CONFIG_MPSL_FEM_NRF21540_RUNTIME_PA_GAIN_CONTROL=y, the driver will toggle the MODE pin at runtime to select between the two calibrated gains (default 20 dB and 10 dB).

If you see lower than expected power at FEM out, then it means the FEM connection to SoC is not correct. When connecting FEM to SoC, make sure the GPIOs are connected according to your selected GPIOs in the code.

Please check the below pages if you have not seen them:
Enabling FEM support
Enabling GPIO mode support for nRF21540

Best regards,
Ressa

RE: nrf54l15 combine with nrf21540

crm — Thu, 12 Feb 2026 06:57:52 GMT

Thank you for your reply.

1、I have added the ant_sel pin in the Device Tree. How can I control this pin? Are the other pins automatically handled at runtime?

[quote userid="145693" url="~/f/nordic-q-a/126966/nrf54l15-combine-with-nrf21540"]

nrf_radio_fem: nrf21540_fem{

compatible="nordic,nrf21540-fem";

tx-en-gpios=<&gpio1 9 GPIO_ACTIVE_HIGH>;

rx-en-gpios=<&gpio1 11 GPIO_ACTIVE_HIGH>;

mode-gpios=<&gpio1 12 GPIO_ACTIVE_HIGH>;

ant-sel-gpios=<&gpio1 10 GPIO_ACTIVE_HIGH>;

pdn-gpios=<&gpio1 8 GPIO_ACTIVE_HIGH>;

supply-voltage-mv=<3000>;

trx-hold-time-us = <10>;

pdn-settle-time-us = <17>;

rx-en-settle-time-us = <10>;

tx-en-settle-time-us = <10>;

};

[/quote]

2、Why does adding the FEM reduce the transmit power, and what is the purpose of this?I set the TX power of the nRF54 to 0 dBm in the DTM app, but the output power via the nRF21540 is only -8 dBm. VDD 3.0V

RE: nrf54l15 combine with nrf21540

crm — Thu, 12 Feb 2026 06:42:13 GMT

[quote userid="145693" url="~/f/nordic-q-a/126966/nrf54l15-combine-with-nrf21540"]

nrf_radio_fem: nrf21540_fem{

compatible="nordic,nrf21540-fem";

tx-en-gpios=<&gpio1 9 GPIO_ACTIVE_HIGH>;

rx-en-gpios=<&gpio1 11 GPIO_ACTIVE_HIGH>;

mode-gpios=<&gpio1 12 GPIO_ACTIVE_HIGH>;

ant-sel-gpios=<&gpio1 10 GPIO_ACTIVE_HIGH>;

pdn-gpios=<&gpio1 8 GPIO_ACTIVE_HIGH>;

supply-voltage-mv=<3000>;

trx-hold-time-us = <10>;

pdn-settle-time-us = <17>;

rx-en-settle-time-us = <10>;

tx-en-settle-time-us = <10>;

};

[/quote]

Thank you for your reply. I have added the ant_sel pin in the Device Tree. How can I control this pin? Are the other pins automatically handled at runtime?

Why does adding the FEM reduce the transmit power, and what is the purpose of this?I set the TX power of the nRF54 to 0 dBm in the DTM app, but the output power via the nRF21540 is only -8 dBm. VDD 3.0V

RE: nrf54l15 combine with nrf21540

Ressa — Wed, 11 Feb 2026 11:37:43 GMT

Hi,

As Paal mentioned, when you enable FEM, the requested output power will be present at FEM output (antenna port), so the power needs to be checked after FEM when you enable FEM in your configuration.

Best regards,
Ressa

RE: nrf54l15 combine with nrf21540

PaKa — Wed, 11 Feb 2026 10:15:00 GMT

Output power from the SoC will be reduced when you add a FEM into the system. This as the output power will be SoC power + FEM gain. Add the FEM and test again.