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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>GPIO pin reassignment (coexistence pins) for nRF5340 + nRF7002EK (NCS v3.0.0)</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/127468/gpio-pin-reassignment-coexistence-pins-for-nrf5340-nrf7002ek-ncs-v3-0-0</link><description>Hello, 
 I am currently testing a setup combining the nRF5340DK and nRF7002EK using NCS/Toolchain v3.0.0 . 
 I need to reassign the 8 GPIO pins (including Bucken, Grant, etc.) connecting the two chips. But, I have the following two questions: 
 
 
 Question</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 18 Mar 2026 13:28:06 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/127468/gpio-pin-reassignment-coexistence-pins-for-nrf5340-nrf7002ek-ncs-v3-0-0" /><item><title>RE: GPIO pin reassignment (coexistence pins) for nRF5340 + nRF7002EK (NCS v3.0.0)</title><link>https://devzone.nordicsemi.com/thread/563573?ContentTypeID=1</link><pubDate>Wed, 18 Mar 2026 13:28:06 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2f3c4a9a-2a3e-4798-925f-92b098da78b9</guid><dc:creator>Amanda Hsieh</dc:creator><description>&lt;p&gt;Happy to help. &lt;span class="emoticon" data-url="https://devzone.nordicsemi.com/cfs-file/__key/system/emoji/1f642.svg" title="Slight smile"&gt;&amp;#x1f642;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO pin reassignment (coexistence pins) for nRF5340 + nRF7002EK (NCS v3.0.0)</title><link>https://devzone.nordicsemi.com/thread/563514?ContentTypeID=1</link><pubDate>Wed, 18 Mar 2026 02:11:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:586811bc-52cc-45e3-b987-be198705f0d2</guid><dc:creator>gwan0624</dc:creator><description>&lt;p&gt;I appreciate your help. It has been quite challenging to find the specific documentation I need, but your explanation has resolved my confusion&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: GPIO pin reassignment (coexistence pins) for nRF5340 + nRF7002EK (NCS v3.0.0)</title><link>https://devzone.nordicsemi.com/thread/563478?ContentTypeID=1</link><pubDate>Tue, 17 Mar 2026 15:02:42 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:66932f5f-33f3-4ddc-8504-155049bcfb2d</guid><dc:creator>Amanda Hsieh</dc:creator><description>&lt;p&gt;Hi,&amp;nbsp;&lt;/p&gt;
[quote user=""]&lt;p&gt;However, for the &lt;b&gt;coexistence pins&lt;/b&gt;, I could not find any files in the build folder that reference the &lt;code&gt;nrf_radio_coex&lt;/code&gt; node.&lt;/p&gt;
&lt;p&gt;Were these pin changes actually applied? Or are they being ignored?&lt;/p&gt;[/quote]
&lt;p&gt;See&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://github.com/nrfconnect/sdk-nrf/blob/v3.2.4/subsys/mpsl/cx/1wire/mpsl_cx_1wire.c#L32"&gt;https://github.com/nrfconnect/sdk-nrf/blob/v3.2.4/subsys/mpsl/cx/1wire/mpsl_cx_1wire.c#L32&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://github.com/nrfconnect/sdk-nrf/blob/v3.2.4/subsys/mpsl/cx/Kconfig"&gt;https://github.com/nrfconnect/sdk-nrf/blob/v3.2.4/subsys/mpsl/cx/Kconfig&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://github.com/nrfconnect/sdk-nrf/blob/v3.2.4/subsys/mpsl/cx/nrf700x/mpsl_cx_nrf700x.c#L49"&gt;https://github.com/nrfconnect/sdk-nrf/blob/v3.2.4/subsys/mpsl/cx/nrf700x/mpsl_cx_nrf700x.c#L49&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://github.com/nrfconnect/sdk-nrf/blob/v3.2.4/subsys/mpsl/cx/3wire/mpsl_cx_3wire.c#L35"&gt;https://github.com/nrfconnect/sdk-nrf/blob/v3.2.4/subsys/mpsl/cx/3wire/mpsl_cx_3wire.c#L35&lt;/a&gt;&lt;/p&gt;
[quote user=""]I have searched through the shield files but could not find the definition for &lt;b&gt;SW_CTRL0&lt;/b&gt;. Where is this pin defined?[/quote]
&lt;p&gt;SW_CTRL0&amp;nbsp;is an&amp;nbsp;output&amp;nbsp;signal from the nRF70 Series device.&amp;nbsp;It is&amp;nbsp;mandatory for 3-wire and 4-wire Shared Antenna mode, and optional otherwise.&amp;nbsp;It corresponds to the Bluetooth LE/IEEE 802.15.4 signal&amp;nbsp;RF_SW_CTRL0&amp;nbsp;and is used for&amp;nbsp;antenna switch control in Shared Antenna mode. See&amp;nbsp;&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf7002/page/chapters/functional/doc/coexistence.html" rel="noopener noreferrer" target="_blank"&gt;nRF7002 coexistence&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;Regards,&lt;br /&gt;Amanda H.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>