<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPI master reconfigure on nRF54L15</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/127562/spi-master-reconfigure-on-nrf54l15</link><description>Hi, 
 I have an application with 2 SPI IC connected to the same SPIM port of nRF54L15. 
 These 2 ICs have different SPI mode: 
 A: SPI Mode 1 (CPOL 0 CPHA 1) 
 B: SPI Mode 0 (CPOL 0 CPHA 0) 
 Should I reconfigure SPI before each communication? Like this</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 26 Mar 2026 09:48:59 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/127562/spi-master-reconfigure-on-nrf54l15" /><item><title>RE: SPI master reconfigure on nRF54L15</title><link>https://devzone.nordicsemi.com/thread/564087?ContentTypeID=1</link><pubDate>Thu, 26 Mar 2026 09:48:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:4e53740b-a649-49d6-906c-0cfd8a19ec48</guid><dc:creator>Vidar Berg</dc:creator><description>&lt;p&gt;Yes, you may add the&amp;nbsp;&lt;span&gt;spi-cpha;&lt;/span&gt;&amp;nbsp;property to your devictree node. Alternatively, you can specify the mode to use in SW in your driver implementation.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master reconfigure on nRF54L15</title><link>https://devzone.nordicsemi.com/thread/564085?ContentTypeID=1</link><pubDate>Thu, 26 Mar 2026 09:37:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:900542b6-ce15-4f7c-a388-46c38b14ebfc</guid><dc:creator>Anthony Yuan</dc:creator><description>&lt;p&gt;Thanks for your reply.&lt;/p&gt;
&lt;p&gt;Is it mean that I&amp;nbsp;just need to&amp;nbsp;define&amp;nbsp;&lt;span&gt;spi-cpha; in the spi mode 1&amp;#39;s node and the spim driver will handle that?&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master reconfigure on nRF54L15</title><link>https://devzone.nordicsemi.com/thread/563998?ContentTypeID=1</link><pubDate>Wed, 25 Mar 2026 08:24:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:dfd796aa-90ec-4b43-9536-36dd32204405</guid><dc:creator>Vidar Berg</dc:creator><description>&lt;p&gt;Hi Yuan,&lt;/p&gt;
&lt;p&gt;Thanks.&amp;nbsp;So when the driver uses the SPI_DT_SPEC_INST_GET() or&amp;nbsp;SPI_DT_SPEC_GET() macro to get the SPI configuration for a particular bus device, it will may also change the default SPI mode as shown here:&amp;nbsp;&lt;a href="https://github.com/nrfconnect/sdk-nrf/blob/7e6ec2ee7d41f6c2ff65ef3620ec07a2b04237f5/tests/benchmarks/multicore/idle_spim/src/main.c#L21"&gt;https://github.com/nrfconnect/sdk-nrf/blob/7e6ec2ee7d41f6c2ff65ef3620ec07a2b04237f5/tests/benchmarks/multicore/idle_spim/src/main.c#L21&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Vidar&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master reconfigure on nRF54L15</title><link>https://devzone.nordicsemi.com/thread/563990?ContentTypeID=1</link><pubDate>Wed, 25 Mar 2026 02:07:37 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3443a3b4-a029-4b32-b706-12cb3729ec22</guid><dc:creator>Anthony Yuan</dc:creator><description>&lt;p&gt;Hi Vidar,&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;My plan is using devicetree to define compatible spim devices like this (Not verified, may have some error):&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;&amp;amp;spi21 {
    compatible = &amp;quot;nordic,nrf-spim&amp;quot;;
    status = &amp;quot;okay&amp;quot;;
    
    pinctrl-0 = &amp;lt;&amp;amp;spi21_default&amp;gt;;
    pinctrl-1 = &amp;lt;&amp;amp;spi21_sleep&amp;gt;;
    pinctrl-names = &amp;quot;default&amp;quot;, &amp;quot;sleep&amp;quot;;

    nucleo_nfc@0 {
        compatible = &amp;quot;x-nucleo-nfc&amp;quot;;
        reg = &amp;lt;0&amp;gt;;
        spi-max-frequency = &amp;lt;DT_FREQ_M(8)&amp;gt;;
        irq-gpios = &amp;lt;&amp;amp;gpio0 4 GPIO_ACTIVE_HIGH&amp;gt;;
        cs-gpios = &amp;lt;&amp;amp;gpio2 8 GPIO_ACTIVE_LOW&amp;gt;;
    };

    gd25q32e: gd25q32e@0 {
        compatible = &amp;quot;nordic,spi-nor&amp;quot;;
        reg = &amp;lt;0&amp;gt;;
        writeoc = &amp;quot;pp4o&amp;quot;;
        readoc = &amp;quot;read4io&amp;quot;;
        sck-frequency = &amp;lt;8000000&amp;gt;;
        label = &amp;quot;GD25Q32E&amp;quot;;
        jedec-id = [c8 40 16];
        size = &amp;lt;33554432&amp;gt;;
        has-dpd;
        t-enter-dpd = &amp;lt;10000&amp;gt;;
        t-exit-dpd = &amp;lt;35000&amp;gt;;
        cs-gpios = &amp;lt;&amp;amp;gpio2 9 GPIO_ACTIVE_LOW&amp;gt;;
    };
};
&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;Regards,&lt;/p&gt;
&lt;p&gt;Yuan Bo&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPI master reconfigure on nRF54L15</title><link>https://devzone.nordicsemi.com/thread/563925?ContentTypeID=1</link><pubDate>Tue, 24 Mar 2026 08:06:36 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:032bff48-dc77-4cc2-8ca7-4408543a21cb</guid><dc:creator>Vidar Berg</dc:creator><description>&lt;p&gt;Hi Yuan,&lt;/p&gt;
&lt;p&gt;The SPI mode is configured for each device on the bus individually. Do you have anything implemented already? If so,&amp;nbsp;could you say a bit more about your current implementation. For example, if you are using the Zephyr SPI driver api directly from your application.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Vidar&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>