<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>In nRF54LM20 SPI/QSPI and UART peripherals can operate independently in QFN-52 Package</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/127649/in-nrf54lm20-spi-qspi-and-uart-peripherals-can-operate-independently-in-qfn-52-package</link><description>Hi, 
 “ We are designing our board with the nRF54LM20, and both the SPI/QSPI and UART peripherals can operate independently and be mapped to separate GPIOs.in QFN-52 Package” 
 
 Regards, 
 Irfan</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 31 Mar 2026 18:05:51 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/127649/in-nrf54lm20-spi-qspi-and-uart-peripherals-can-operate-independently-in-qfn-52-package" /><item><title>RE: In nRF54LM20 SPI/QSPI and UART peripherals can operate independently in QFN-52 Package</title><link>https://devzone.nordicsemi.com/thread/564328?ContentTypeID=1</link><pubDate>Tue, 31 Mar 2026 18:05:51 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e85c484b-a8c8-407d-9dee-8afb7c192df7</guid><dc:creator>SwRa</dc:creator><description>&lt;p&gt;Hi Irfan,&lt;/p&gt;
&lt;p&gt;That is correct.&amp;nbsp;&lt;span&gt;SPI and UART peripherals can&amp;nbsp;&lt;/span&gt;&lt;span&gt;operate independently on separate GPIOs, provided you follow the port-domain rules and dedicated pin constraints.&amp;nbsp;Refer:&amp;nbsp;&lt;a href="https://academy.nordicsemi.com/courses/nrf54l-series-express-course/lessons/lesson-2-power-domains-event-system-and-gpio/topic/gpio-ports-and-pin-planning/#Summary-of-port-capabilities"&gt;GPIO ports and pin planning - Nordic Developer Academy&lt;/a&gt;&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Best Regards,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Swathy&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>