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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF54L15 UART RX Stall during Flash Write (S32K344 to nRF54 OTA)</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/127701/nrf54l15-uart-rx-stall-during-flash-write-s32k344-to-nrf54-ota</link><description>Environment: 
 
 
 nRF Connect SDK (NCS): v3.1.0 
 
 
 Hardware: nRF54L15 (Custom/DK) 
 
 
 External MCU: S32K344 (sending data via UART @ 115200 baud) 
 
 
 Toolchain: Zephyr OS v4.1.99 
 
 
 Issue Description: I am implementing a custom UART-based OTA</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 08 Apr 2026 06:38:47 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/127701/nrf54l15-uart-rx-stall-during-flash-write-s32k344-to-nrf54-ota" /><item><title>RE: nRF54L15 UART RX Stall during Flash Write (S32K344 to nRF54 OTA)</title><link>https://devzone.nordicsemi.com/thread/564577?ContentTypeID=1</link><pubDate>Wed, 08 Apr 2026 06:38:47 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2bfe2dde-4b47-4821-8b7b-86ef66e25faf</guid><dc:creator>Vidar Berg</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;The program is most likely entering the error handler since you are seeing the device rebooting. The first step should be to determine which runtime error led to the error handler being invoked. To do this, make sure logging is enabled and build the project with CONFIG_RESET_ON_FATAL_ERROR=n. You should then get a crashlog when the transfer stops.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF54L15 UART RX Stall during Flash Write (S32K344 to nRF54 OTA)</title><link>https://devzone.nordicsemi.com/thread/564548?ContentTypeID=1</link><pubDate>Tue, 07 Apr 2026 16:01:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:c579d678-958d-4c42-92e8-4e637b774b38</guid><dc:creator>Yuvashree</dc:creator><description>&lt;p data-path-to-node="5"&gt;Hello,&lt;/p&gt;
&lt;p data-path-to-node="6"&gt;Thank you for the observation. I have now enabled &lt;b data-path-to-node="6" data-index-in-node="50"&gt;Hardware Flow Control (RTS/CTS)&lt;/b&gt; in both the &lt;code data-path-to-node="6" data-index-in-node="94"&gt;pinctrl&lt;/code&gt; and the UART node in my overlay. This significantly improved the stability of the transfer, and the S32 (sender) is now correctly pausing when the nRF54L15 asserts the RTS pin during flash writes.&lt;/p&gt;
&lt;p data-path-to-node="7"&gt;&lt;b data-path-to-node="7" data-index-in-node="0"&gt;Current Status:&lt;/b&gt;&lt;/p&gt;
&lt;ul data-path-to-node="8"&gt;
&lt;li&gt;
&lt;p data-path-to-node="8,0,0"&gt;&lt;b data-path-to-node="8,0,0" data-index-in-node="0"&gt;Hardware:&lt;/b&gt; nRF54L15 DK (Connected to S32K3 via UART with RTS/CTS).&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p data-path-to-node="8,1,0"&gt;&lt;b data-path-to-node="8,1,0" data-index-in-node="0"&gt;SDK:&lt;/b&gt; nRF Connect SDK v3.1.0.&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p data-path-to-node="8,2,0"&gt;&lt;b data-path-to-node="8,2,0" data-index-in-node="0"&gt;Image Size:&lt;/b&gt; 50,044 bytes.&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p data-path-to-node="8,3,0"&gt;&lt;b data-path-to-node="8,3,0" data-index-in-node="0"&gt;Issue:&lt;/b&gt; The transfer consistently reaches approximately &lt;b data-path-to-node="8,3,0" data-index-in-node="55"&gt;48,160 bytes&lt;/b&gt;, at which point the nRF54L15 performs a hardware reset (I see the bootloader banner again).&lt;/p&gt;
&lt;/li&gt;
&lt;/ul&gt;
&lt;p data-path-to-node="9"&gt;&lt;b data-path-to-node="9" data-index-in-node="0"&gt;Observations &amp;amp; Obstacles:&lt;/b&gt;&lt;/p&gt;
&lt;ol start="1" data-path-to-node="10"&gt;
&lt;li&gt;
&lt;p data-path-to-node="10,0,0"&gt;&lt;b data-path-to-node="10,0,0" data-index-in-node="0"&gt;RRAM/Flash Label:&lt;/b&gt; While trying to adjust partitions to fix the 48KB crash, I encountered a CMake error: &lt;code data-path-to-node="10,0,0" data-index-in-node="104"&gt;undefined node label &amp;#39;flash0&amp;#39;&lt;/code&gt;.&amp;nbsp;&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p data-path-to-node="10,1,0"&gt;&lt;b data-path-to-node="10,1,0" data-index-in-node="0"&gt;The 48KB Crash:&lt;/b&gt; Since the crash happens right at the end of the 50KB image, I suspect a conflict between the &lt;code data-path-to-node="10,1,0" data-index-in-node="109"&gt;stream_flash&lt;/code&gt; buffered write and the MCUboot trailer area at the end of the partition.&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p data-path-to-node="10,2,0"&gt;&lt;b data-path-to-node="10,2,0" data-index-in-node="0"&gt;Partition Config:&lt;/b&gt; I am using &lt;code data-path-to-node="10,2,0" data-index-in-node="29"&gt;SB_CONFIG_BOOTLOADER_MCUBOOT=y&lt;/code&gt;. My current overlay defines &lt;code data-path-to-node="10,2,0" data-index-in-node="88"&gt;slot0_partition&lt;/code&gt; and &lt;code data-path-to-node="10,2,0" data-index-in-node="108"&gt;slot1_partition&lt;/code&gt; as 256KB (&lt;code data-path-to-node="10,2,0" data-index-in-node="134"&gt;0x40000&lt;/code&gt;) each.&lt;/p&gt;
&lt;/li&gt;
&lt;/ol&gt;
&lt;p data-path-to-node="11"&gt;&lt;b data-path-to-node="11" data-index-in-node="0"&gt;Questions:&lt;/b&gt;&lt;/p&gt;
&lt;ul data-path-to-node="12"&gt;
&lt;li&gt;
&lt;p data-path-to-node="12,0,0"&gt;Does the nRF54L15 RRAM driver have specific alignment requirements that could trigger a system reset if the final &amp;quot;tail&amp;quot; of the image (which is not a multiple of the block size) is written?&lt;/p&gt;
&lt;/li&gt;
&lt;li&gt;
&lt;p data-path-to-node="12,1,0"&gt;Should I be using &lt;code data-path-to-node="12,1,0" data-index-in-node="18"&gt;pm_static.yml&lt;/code&gt; instead of a devicetree overlay for the nRF54L15 to ensure the Partition Manager and MCUboot are perfectly aligned?&lt;/p&gt;
&lt;/li&gt;
&lt;/ul&gt;
&lt;p data-path-to-node="13"&gt;I would appreciate any insight into why the device reboots specifically during the final stage of the &lt;code data-path-to-node="13" data-index-in-node="102"&gt;flash_img_buffered_write&lt;/code&gt; process.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: nRF54L15 UART RX Stall during Flash Write (S32K344 to nRF54 OTA)</title><link>https://devzone.nordicsemi.com/thread/564499?ContentTypeID=1</link><pubDate>Tue, 07 Apr 2026 11:12:47 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:08f96c32-0787-4567-8aa8-768d0438b66f</guid><dc:creator>Vidar Berg</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;When using the interrupt driven API you generally need flow control to support reliable reception. Is there anything preventing you from enabling HW flow control with your current HW? I see you have commented the &amp;quot;hw-flow-control&amp;quot; property in your overlay and not specified the CTS/RTS pinout in the pinctrl node.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Vidar&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>