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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF54L05 SAADC AIN0–AIN2 unstable / affected by TAMPC?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/127743/nrf54l05-saadc-ain0-ain2-unstable-affected-by-tampc</link><description>Hello, 
 I am working with the nRF54L05 and testing SAADC inputs. 
 I observed the following behavior: 
 
 AIN4–AIN7 work correctly as ADC inputs 
 AIN0–AIN2 show unstable or saturated readings 
 Example: AIN0 often reads near full scale (~4092), even</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 10 Apr 2026 12:56:33 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/127743/nrf54l05-saadc-ain0-ain2-unstable-affected-by-tampc" /><item><title>RE: nRF54L05 SAADC AIN0–AIN2 unstable / affected by TAMPC?</title><link>https://devzone.nordicsemi.com/thread/564791?ContentTypeID=1</link><pubDate>Fri, 10 Apr 2026 12:56:33 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5b30d9d1-4912-4984-a0c9-903c85bcf271</guid><dc:creator>Syed Maysum Abbas Zaidi</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;On the nRF54L05, the analog input pins (AIN0-AIN5) are shared with the TAMPC active shield,&amp;nbsp;only AIN6 and AIN7 are fully free of TAMPC as shown in the&amp;nbsp;&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/chapters/pin.html"&gt;Pin assignment table&lt;/a&gt;&amp;nbsp;and the pins reserved for the a TAMPC active shield detector&amp;nbsp;can be used as generic GPIO pins when&amp;nbsp;its channel is unuse, and therefore as SAADC analog inputs.&amp;nbsp;The channels are enabled using the CH[i] fields in the register&amp;nbsp;&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/tampc.html#register.ACTIVESHIELD.CHEN"&gt;ACTIVESHIELD.CHEN&lt;/a&gt;.&lt;/p&gt;
&lt;p&gt;Although&amp;nbsp;ACTIVESHIELD.CHEN register resets to 0x00000000, meaning all active shield channels are disabled at power-on but you can ensure&amp;nbsp;the relevant TAMPC channels are disabled for any AIN pin shared with TAMPC before using it as an SAADC input.&amp;nbsp;&lt;/p&gt;
&lt;p&gt;To check whether TAMPC active shield channels are enabled at runtime, you can use the nrfx HAL function:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;nrf_tampc_activeshield_channel_enable_check(NRF_TAMPC, mask);&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;This function returns a mask of the currently enabled active shield channels. A return value of 0x00000000 confirms all channels are off.&lt;/p&gt;
&lt;p&gt;Best Regards,&lt;br /&gt;Syed Maysum&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>