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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nrf54: (Ab)using SPIM as a shift-register - between-TXLIST latency</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/128004/nrf54-ab-using-spim-as-a-shift-register---between-txlist-latency</link><description>Hi 
 I&amp;#39;m trying to drive a 75hc595-type shift register with a SPIM instance on the nrf54l15. 
 I connect MOSI to the shift register data input, CLK to the shift register clock, and CSN to the output-stage-enable register (i.e. latch from the input shifter</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 04 May 2026 14:10:57 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/128004/nrf54-ab-using-spim-as-a-shift-register---between-txlist-latency" /><item><title>RE: nrf54: (Ab)using SPIM as a shift-register - between-TXLIST latency</title><link>https://devzone.nordicsemi.com/thread/565838?ContentTypeID=1</link><pubDate>Mon, 04 May 2026 14:10:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:98adc83b-e519-43aa-a58a-37d3c587d290</guid><dc:creator>H&amp;#229;kon Alseth</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Do you have any measurements to share, so I can see the delay? I would expect 1 us typically, based on the description in the datasheet.&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;The time from .START -&amp;gt; actual transmission start is typically 1 us:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/_tmp/nrf54l15/autodita/SPIM/parameters.elec_spec.html"&gt;https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/_tmp/nrf54l15/autodita/SPIM/parameters.elec_spec.html&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;And when .PSEL.CSN is configured, the timing will behave as described in the datasheet:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/spim.html#ariaid-title4"&gt;https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/spim.html#ariaid-title4&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Ie. you will get a delay before- and after a transmission, thus you will see a &amp;quot;double delay&amp;quot; between each transaction (one byte in your scenario).&lt;/p&gt;
[quote user=""]I set IFTIMING.CSNDUR to 0.[/quote]
&lt;p&gt;If we look at the definition of this register:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/spim.html#ariaid-title59"&gt;https://docs.nordicsemi.com/bundle/ps_nrf54L15/page/spim.html#ariaid-title59&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;it mentions specifically:&lt;/p&gt;
&lt;p&gt;&lt;em&gt;Note that for low values of CSNDUR, the system turnaround time will dominate the actual time between transactions&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Kind regards,&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;Håkon&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>