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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SPIM</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/128020/spim</link><description>Hi everyone, 
 I am trying to use SPIM for an external DAC. The DAC does not require MISO, only SCK, MOSI, and CS. 
 I configured SPIM like this: 
 
 #define SPI_DAC NRF_SPIM2 
 
 SPI_DAC-&amp;gt;ENABLE = SPIM_ENABLE_ENABLE_Enabled;
SPI_DAC-&amp;gt;FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M8</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Fri, 29 May 2026 09:40:01 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/128020/spim" /><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/567102?ContentTypeID=1</link><pubDate>Fri, 29 May 2026 09:40:01 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e125a425-0622-4e0c-9084-b3f2c722084a</guid><dc:creator>Kazi Afroza Sultana</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Yes. you are right. When speed is as high as 32Mbps, normal GPIO routing is not fast enough or clean enough electrically. That&amp;#39;s why SPIM4 has dedicated physical pins for SPIM4 that bypass the normal GPIO matrix. Only SPIM4 has hardware controlled CS.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/567030?ContentTypeID=1</link><pubDate>Thu, 28 May 2026 11:04:57 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3c3cb9af-d620-4fb6-af2f-5025af2a1261</guid><dc:creator>Petar02</dc:creator><description>&lt;p&gt;Yea, what i meant is that for nrf5340 only SPIM4 with&amp;nbsp;dedicated pins can control CS, others dont have hardver enable CS control, I had manualy to set CS low for SPIM transfer.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/567021?ContentTypeID=1</link><pubDate>Thu, 28 May 2026 10:06:34 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:235a15e9-f1ae-4d21-bf41-a0279662857a</guid><dc:creator>Kazi Afroza Sultana</dc:creator><description>&lt;p&gt;Can you please explain what did you mean here?&lt;/p&gt;
&lt;p&gt;&lt;span&gt;SPIM4 is the only instance supporting up to 32 Mbps, but this is&amp;nbsp;&lt;/span&gt;not directly related&lt;span&gt;&amp;nbsp;to the&amp;nbsp;&lt;/span&gt;&lt;code dir="ltr"&gt;EVENTS_END&lt;/code&gt;&lt;span&gt;&amp;nbsp;never being set issue. have you tried the example code I showed before?&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/566138?ContentTypeID=1</link><pubDate>Fri, 08 May 2026 16:22:23 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e7afc0e2-44b9-4087-8271-d370e7cd955f</guid><dc:creator>Petar02</dc:creator><description>&lt;p&gt;Yes u are right but only for SPIM4 or this is wrong?&lt;img style="max-height:240px;max-width:320px;" alt=" " src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/Screenshot-2026_2D00_05_2D00_08-182140.png" /&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/566128?ContentTypeID=1</link><pubDate>Fri, 08 May 2026 14:02:03 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5f0a4cf3-2c2d-4b75-8b28-21e212d2bc8c</guid><dc:creator>Kazi Afroza Sultana</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;You need to configure CSN pin as output in the GPIO peripheral with intial value high before enabling SPIM. source:&lt;a href="https://docs.nordicsemi.com/bundle/ps_nrf5340/page/spim.html#ariaid-title4"&gt;SPIM — Serial peripheral interface master with EasyDMA&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;The key points here is to configure GPIO before SPIM is enabled and to set PSEL registers while SPIM is disabled. So , your approach is correct now.&lt;/p&gt;
&lt;p&gt;For example something like below code (based on your code in first thread)&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="text"&gt;// 1. Make sure SPIM is disabled first
SPI_DAC-&amp;gt;ENABLE = SPIM_ENABLE_ENABLE_Disabled;

// 2. Configure GPIO pins BEFORE enabling SPIM
// SCK - output, initial value same as CPOL (0 for Mode 0)
nrf_gpio_pin_clear(NRF_GPIO_PIN_MAP(0, 29));
nrf_gpio_cfg_output(NRF_GPIO_PIN_MAP(0, 29));

// MOSI - output, initial value 0
nrf_gpio_pin_clear(NRF_GPIO_PIN_MAP(1, 10));
nrf_gpio_cfg_output(NRF_GPIO_PIN_MAP(1, 10));

// CSN - output, initial value 1 (deasserted/high)
nrf_gpio_pin_set(CSPIN);
nrf_gpio_cfg_output(CSPIN);

// 3. Configure PSEL registers while SPIM is still disabled
SPI_DAC-&amp;gt;PSEL.SCK  = NRF_GPIO_PIN_MAP(0, 29);
SPI_DAC-&amp;gt;PSEL.MOSI = NRF_GPIO_PIN_MAP(1, 10);
SPI_DAC-&amp;gt;PSEL.MISO = NRF_SPIM_PIN_NOT_CONNECTED;
SPI_DAC-&amp;gt;PSEL.CSN  = CSPIN;  // SPIM will now control CS automatically

// 4. Configure frequency and SPI mode
SPI_DAC-&amp;gt;FREQUENCY = SPIM_FREQUENCY_FREQUENCY_M8 &amp;lt;&amp;lt; SPIM_FREQUENCY_FREQUENCY_Pos;
SPI_DAC-&amp;gt;CONFIG =
    (SPIM_CONFIG_ORDER_MsbFirst  &amp;lt;&amp;lt; SPIM_CONFIG_ORDER_Pos) |
    (SPIM_CONFIG_CPOL_ActiveHigh &amp;lt;&amp;lt; SPIM_CONFIG_CPOL_Pos)  |
    (SPIM_CONFIG_CPHA_Leading    &amp;lt;&amp;lt; SPIM_CONFIG_CPHA_Pos);  // Mode 0

// 5. Set up DMA buffers
SPI_DAC-&amp;gt;TXD.LIST   = 0;
SPI_DAC-&amp;gt;RXD.LIST   = 0;
SPI_DAC-&amp;gt;TXD.PTR    = (uint32_t)&amp;amp;dac_tx_buf;
SPI_DAC-&amp;gt;TXD.MAXCNT = 2;
SPI_DAC-&amp;gt;RXD.PTR    = 0;
SPI_DAC-&amp;gt;RXD.MAXCNT = 0;  // No RX needed for DAC

// 6. Enable SPIM
SPI_DAC-&amp;gt;ENABLE = SPIM_ENABLE_ENABLE_Enabled;

// 7. Start transfer - SPIM will automatically:
//    - Pull CSN low
//    - Clock out data on MOSI
//    - Pull CSN high when done
SPI_DAC-&amp;gt;EVENTS_END = 0;
SPI_DAC-&amp;gt;TASKS_START = 1;

while (!SPI_DAC-&amp;gt;EVENTS_END) { /* wait */ }
SPI_DAC-&amp;gt;EVENTS_END = 0;&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/565965?ContentTypeID=1</link><pubDate>Wed, 06 May 2026 12:12:06 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:7f2b15b3-a175-456d-846a-1ba40e43d2a4</guid><dc:creator>Petar02</dc:creator><description>&lt;p&gt;Yea i did. But now i saw what the problem is. On nrf5340 CSN is not supported, only for SPIM4 on dedicated pin.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/565964?ContentTypeID=1</link><pubDate>Wed, 06 May 2026 12:08:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:553d4469-2f11-42ea-a3f3-2571bfe3af4b</guid><dc:creator>Kazi Afroza Sultana</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;Did you delete your previous message about solving the issue? I will look for it now.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/565954?ContentTypeID=1</link><pubDate>Wed, 06 May 2026 10:12:04 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:8b2b53c8-40d2-4532-9d06-d20821ad82f2</guid><dc:creator>Petar02</dc:creator><description>&lt;p&gt;Im using logic analyzer. I saw that i disabled by accident a spim, after fixing that i now see SCLK MOSI generating, but still have problem with CS. If i do this&amp;nbsp;SPI_DAC-&amp;gt;PSEL.CSN = CSPIN; does than SPIM controls CS, with task start will he put pin low and after transfer put it high ?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/565951?ContentTypeID=1</link><pubDate>Wed, 06 May 2026 09:49:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:ab8963cc-8732-4185-8584-bd9840bd7463</guid><dc:creator>Turbo J</dc:creator><description>&lt;p&gt;I recommend using an oscilloscope.&lt;/p&gt;
&lt;p&gt;The SPIM units have the quirk that they require to &amp;quot;see&amp;quot; level changes on the SCK pin and will stop (and not produce end event) otherwise.&lt;/p&gt;
&lt;p&gt;Its very easy to overlook a pin being used elsewhere in the DTS or being forwarded to the net core.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/565949?ContentTypeID=1</link><pubDate>Wed, 06 May 2026 08:34:27 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:0126be7b-e8e4-4114-a166-a6536b4cd697</guid><dc:creator>Petar02</dc:creator><description>&lt;p&gt;I tried that but its the same. Im using two SPIMs one for DAC and one for ADC.&lt;/p&gt;
&lt;p&gt;Same code that Im using I have used for ADC but on nrf52480 and there works fine, also there i was manually setting CS pin and tried that on nrf5340. I done what u suggested but it stil doesnt work properly.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/565911?ContentTypeID=1</link><pubDate>Tue, 05 May 2026 17:23:15 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:2ff13eb1-b773-46bf-8a05-cc684e56fa25</guid><dc:creator>hmolesworth</dc:creator><description>&lt;p&gt;Maybe try disabling SPIM before setting up the pins:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;  // Manual says disable SPI before changing pins, but actually doesn&amp;#39;t matter
  NRF_DAC0-&amp;gt;ENABLE = 0;               // disable SPI
  
  // Set up pins here
  
  NRF_DAC0-&amp;gt;ENABLE = 7;               // enable SPI
&lt;/pre&gt;&lt;/p&gt;
&lt;p&gt;Also use an actual pin for CSN (if using SPIM to drive CSN) and be sure to set pin output mode:&lt;/p&gt;
&lt;p&gt;&lt;pre class="ui-code" data-mode="c_cpp"&gt;This won&amp;#39;t work:
  SPI_DAC-&amp;gt;PSEL.CSN = NRF_SPIM_PIN_NOT_CONNECTED;
  
  Maybe try something like:
  NRF_GPIO-&amp;gt;PIN_CNF[CSPIN]   = 0x301;  // output, high drive high and low H0H1
  NRF_GPIO-&amp;gt;PIN_CNF[SCKPIN]  = 0x301;  // output, high drive high and low H0H1
  NRF_GPIO-&amp;gt;PIN_CNF[MOSIPIN] = 1;      // output, standard drive S0S1
  SPI_DAC-&amp;gt;PSEL.CSN = CSPIN;
  SPI_DAC-&amp;gt;PSEL.SCK = NRF_GPIO_PIN_MAP(0, 29);
  SPI_DAC-&amp;gt;PSEL.MOSI = NRF_GPIO_PIN_MAP(1, 10);
&lt;/pre&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: SPIM</title><link>https://devzone.nordicsemi.com/thread/565898?ContentTypeID=1</link><pubDate>Tue, 05 May 2026 12:58:55 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:5a034c76-8a9a-41c2-b8c8-20da4acd53f4</guid><dc:creator>Petar02</dc:creator><description>&lt;p&gt;Sorry same problem stil.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>