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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Audio is not get</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/128272/audio-is-not-get</link><description>I am interfacing a TLV320AIC3204 codec EVM with an nRF54L15 board using I2S. 
 The codec EVM default configuration is working correctly. I verified audio on the EVM side. 
 Current clock configuration: 
 
 
 MCLK = 12 MHz 
 
 
 BCLK = 3 MHz 
 
 
 LRCK</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 28 May 2026 12:29:55 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/128272/audio-is-not-get" /><item><title>RE: Audio is not get</title><link>https://devzone.nordicsemi.com/thread/567041?ContentTypeID=1</link><pubDate>Thu, 28 May 2026 12:29:55 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:24998d6c-77f1-474c-9df1-54d06c2057e4</guid><dc:creator>Einar Thorsrud</dc:creator><description>&lt;p&gt;Hi,&lt;/p&gt;
&lt;p&gt;I am not able to say much for sure, but there&amp;nbsp;is one thing that sticks out. BCLK ratio looks off For stereo I2S at 48 kHz you need BCLK = 48k × 2 × WS = 1.536 MHz (16-bit) or 3.072 MHz (32-bit). 3.000 MHz isn&amp;#39;t a valid frame length and the I2S peripheral won&amp;#39;t latch valid samples. Double-check your codec BCLK divider (Page 0, Reg 30) — with BDIV=2 from a typical DAC_CLK path you should be getting 3.072 MHz, not 3.000 MHz.&lt;/p&gt;
&lt;p&gt;Other than that,&lt;/p&gt;
&lt;ol&gt;
&lt;li&gt;can you share your configuration (most relevant&amp;nbsp;pincontrol and devicetree)?&lt;/li&gt;
&lt;li&gt;Which debugging have you done?&lt;/li&gt;
&lt;li&gt;If you observe the I2S lines with a logic analyzer that can analyze I2S, what do you see? Do you see clocks as expected? What about data?&lt;/li&gt;
&lt;li&gt;Are there runtime errors? If so, which?&lt;/li&gt;
&lt;li&gt;Are there build warnings, if so which?&lt;/li&gt;
&lt;/ol&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>