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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>HXFO pin capacitance (Cpin)</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/128279/hxfo-pin-capacitance-cpin</link><description>nRF54LM20A: 
 C pin is the pin input capacitance on pins XC1 and XC2 . 
 
 Could you provide the typical, maximum, and minimum values of Cpin? 
 This information is needed as a reference for external 32 MHz crystal tuning.</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Tue, 02 Jun 2026 05:52:17 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/128279/hxfo-pin-capacitance-cpin" /><item><title>RE: HXFO pin capacitance (Cpin)</title><link>https://devzone.nordicsemi.com/thread/567242?ContentTypeID=1</link><pubDate>Tue, 02 Jun 2026 05:52:17 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f8320540-bdbb-42de-ac9d-21d9fee428ce</guid><dc:creator>MURAKAMI KAZUHIRO</dc:creator><description>&lt;p&gt;Thank you for reply.&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Understood. Since the variation is small, it means we don&amp;rsquo;t need to worry about the upper and lower limits, correct.&lt;br /&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;&lt;br /&gt;&lt;/span&gt;best regards,&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: HXFO pin capacitance (Cpin)</title><link>https://devzone.nordicsemi.com/thread/567216?ContentTypeID=1</link><pubDate>Mon, 01 Jun 2026 14:04:03 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:432b6e40-13a9-478c-aaaf-6618a012d15b</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;The Cpin should have as little variation as possible, so it&amp;#39;s safe to set Cpin in this formula to 3.1pF. Is there a specific reason you need the upper/lower limits?&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: HXFO pin capacitance (Cpin)</title><link>https://devzone.nordicsemi.com/thread/567174?ContentTypeID=1</link><pubDate>Mon, 01 Jun 2026 08:16:11 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d277423a-9bfa-4c04-ad72-eb476a272969</guid><dc:creator>MURAKAMI KAZUHIRO</dc:creator><description>&lt;p&gt;Hi&lt;br /&gt;&lt;br /&gt;&lt;span&gt;&lt;!--mce:protected %3C%21--ScriptorStartFragment--%3E--&gt;Based on the above equation, I would like to know the load capacitance (CL) for the maximum and minimum values of Cpin. Therefore, could you please provide the upper and lower limits of Cpin? &lt;br /&gt;My understanding is that Cpin is different from the internal capacitor.&lt;!--mce:protected %3C%21--ScriptorEndFragment--%3E--&gt;&lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: HXFO pin capacitance (Cpin)</title><link>https://devzone.nordicsemi.com/thread/567163?ContentTypeID=1</link><pubDate>Mon, 01 Jun 2026 06:54:55 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a89f1148-24cf-4373-ad9a-849f782d5956</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;Please see the OSCILLATORS chapter for how to calculate the load capacitance when using external capacitors:&lt;/p&gt;
&lt;p&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1780296768847v5.png" alt=" " /&gt;&lt;/p&gt;
&lt;p&gt;When using external capacitors, the load capacitance (CL) is the total capacitance seen by the crystal across its terminals and is calculated by the equation above. C1 and C2 are the external capacitors. Cpcb1 and Cpcb2 are stray capacitance on the PCB. Cpin is the pin input capacitance on XC1 and XC2. When you use the external capacitors you should disable the internal capacitor by setting&amp;nbsp;&lt;strong&gt;OSCILLATORS.XOSC32M.CONFIG.INTCAP&lt;/strong&gt; to 0.&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: HXFO pin capacitance (Cpin)</title><link>https://devzone.nordicsemi.com/thread/567099?ContentTypeID=1</link><pubDate>Fri, 29 May 2026 09:01:09 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:741a3f0f-c775-4597-a907-a5e22a19c700</guid><dc:creator>MURAKAMI KAZUHIRO</dc:creator><description>&lt;p&gt;&lt;span&gt;&lt;!--ScriptorStartFragment--&gt;&lt;/span&gt;&lt;/p&gt;
&lt;div class="scriptor-paragraph"&gt;&lt;span&gt;The HFXO load capacitance specification of the nRF54LM20A is 6&amp;ndash;9 pF.&lt;/span&gt;&lt;/div&gt;
&lt;div class="scriptor-paragraph"&gt;&lt;span&gt;When designing the external capacitors, we would like to confirm whether the resulting CL stays within this range when considering the tolerance/variation of Cpin.&lt;/span&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: HXFO pin capacitance (Cpin)</title><link>https://devzone.nordicsemi.com/thread/567093?ContentTypeID=1</link><pubDate>Fri, 29 May 2026 07:07:02 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e6129d8f-ce85-4ae7-a6ad-797a4f37c7bc</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Can you explain what you mean by &amp;quot;take the tolerance of Cpin&amp;quot;? Is this a value you want from us?&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: HXFO pin capacitance (Cpin)</title><link>https://devzone.nordicsemi.com/thread/567085?ContentTypeID=1</link><pubDate>Fri, 29 May 2026 01:59:44 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6c0fd918-80c3-4079-8733-c1f43c4fcb27</guid><dc:creator>MURAKAMI KAZUHIRO</dc:creator><description>&lt;p&gt;Thank you for reply.&lt;br /&gt;&lt;br /&gt;&lt;/p&gt;
&lt;div&gt;When determining the value of the external capacitance, I would like to take the tolerance of Cpin.&lt;br /&gt;&lt;span&gt;&lt;!--mce:protected %3C%21--ScriptorStartFragment--%3E--&gt;Although &amp;plusmn;40 ppm is recommended for BLE operation,is it acceptable not to take the tolerance of Cpin ?&lt;!--mce:protected %3C%21--ScriptorEndFragment--%3E--&gt;&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;best regards,&lt;br /&gt;&lt;br /&gt;&lt;/div&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: HXFO pin capacitance (Cpin)</title><link>https://devzone.nordicsemi.com/thread/567028?ContentTypeID=1</link><pubDate>Thu, 28 May 2026 10:45:12 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:6e614d36-e510-4c2a-9c62-6de01c7097cd</guid><dc:creator>Simonr</dc:creator><description>&lt;p&gt;Hi&lt;/p&gt;
&lt;p&gt;The Cpin_HFXO input capacitance capacitance typical value is listed in page 1261 of the nRF54LM20A datasheet:&amp;nbsp;&lt;a href="https://docs-be.nordicsemi.com/bundle/ps_nrf54LM20A/page/pdf/nRF54LM20A_nRF54LM20B_Datasheet_v1.0.pdf"&gt;https://docs-be.nordicsemi.com/bundle/ps_nrf54LM20A/page/pdf/nRF54LM20A_nRF54LM20B_Datasheet_v1.0.pdf&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;We don&amp;#39;t have maximum or minimum values specified I&amp;#39;m afraid, is there a reason you specifically need that?&lt;/p&gt;
&lt;p&gt;Best regards,&lt;/p&gt;
&lt;p&gt;Simon&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>