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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Connecting LPCOMP CROSS event to TWO DPPI-driven tasks (GPIOTE toggle + TIMER count) simultaneously — only the last-configured one fires</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/128605/connecting-lpcomp-cross-event-to-two-dppi-driven-tasks-gpiote-toggle-timer-count-simultaneously-only-the-last-configured-one-fires</link><description>Subject: Connecting LPCOMP CROSS event to TWO DPPI-driven tasks (GPIOTE toggle + TIMER count) simultaneously — only the last-configured one fires 
 Chip: nRF54L15 SDK: nRF Connect SDK v2.9.0 (Zephyr 3.7.99) Board: nrf54l15dk/nrf54l15/cpuapp 
 Hello, </description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 02 Jul 2026 12:48:39 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/128605/connecting-lpcomp-cross-event-to-two-dppi-driven-tasks-gpiote-toggle-timer-count-simultaneously-only-the-last-configured-one-fires" /><item><title>RE: Connecting LPCOMP CROSS event to TWO DPPI-driven tasks (GPIOTE toggle + TIMER count) simultaneously — only the last-configured one fires</title><link>https://devzone.nordicsemi.com/thread/568713?ContentTypeID=1</link><pubDate>Thu, 02 Jul 2026 12:48:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f6e4c6ea-b1ba-4a24-bbe5-8585b1c5c089</guid><dc:creator>Kenneth</dc:creator><description>&lt;p&gt;Hello,&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Question 1: Can one event publish to multiple DPPI channels?&lt;/strong&gt;&lt;br /&gt;No. The datasheet explicitly states &amp;quot;One publish register per event,&amp;quot; and the PUBLISH register has a single CHIDX field. This means Approach A cannot work by design, writing to the same event&amp;#39;s publish register a second time overwrites the first channel assignment, which is what you observed.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Question 2: Why Didn&amp;#39;t Approach B Work?&lt;/strong&gt;&lt;br /&gt;Approach B should work in theory (one channel with multiple task subscriptions), but it failed likely because:&lt;/p&gt;
&lt;p&gt;Domain mismatch not handled - LPCOMP publishes on DPPIC30; GPIOTE/TIMER subscribe on DPPIC20&lt;br /&gt;Missing PPIB configuration - No bridge was set up between the domains&lt;br /&gt;Errata [26] workaround not applied - For nRF54L15 Rev 1 and 2, the PPIB channel number must match the DPPIC channel index (e.g., use PPIB channel 0 with DPPIC channel 0)&amp;nbsp;&lt;a href="https://docs.nordicsemi.com/r/bundle/errata_nrf54l15_rev2/page/err/nrf54l15/rev2/latest/anomaly_l15_26.html"&gt;https://docs.nordicsemi.com/r/bundle/errata_nrf54l15_rev2/page/err/nrf54l15/rev2/latest/anomaly_l15_26.html&lt;/a&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Question 3: Is there a DPPI domain mismatch?&lt;/strong&gt;&lt;br /&gt;Likely wes. Looking at the instantiation table:&lt;/p&gt;
&lt;p&gt;Peripheral&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Domain&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; DPPIC&lt;/p&gt;
&lt;p&gt;LPCOMP&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/span&gt;LP&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/span&gt;DPPIC30 (4 channels)&lt;/p&gt;
&lt;p&gt;GPIOTE20&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/span&gt;PERI&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/span&gt;DPPIC20 (16 channels)&lt;/p&gt;
&lt;p&gt;TIMER20/21&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/span&gt;PERI&lt;span&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/span&gt;DPPIC20 (16 channels)&lt;/p&gt;
&lt;p&gt;LPCOMP is in the LP power domain with DPPIC30, while GPIOTE20 and TIMER20/21 are in the PERI power domain with DPPIC20. These domains cannot communicate directly via DPPI.&lt;/p&gt;
&lt;p&gt;Use PPIB (PPI Bridge) to Cross Domains.&amp;nbsp;To connect LPCOMP -&amp;gt; GPIOTE20/TIMER20, you must bridge the LP domain to the PERI domain using PPIB30 -&amp;gt;&amp;nbsp;PPIB22 (per the Figure 23: Power domains and PPI bridges in datasheet).&lt;/p&gt;
&lt;p&gt;Hope that helps,&lt;br /&gt;Kenneth&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>