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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>FLPR GPIO Interrupts</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/128916/flpr-gpio-interrupts</link><description>Hello, 
 I have a pin on port 1 of the nrf54l15 that I am bitbanging for a custom tx/rx 2-wire protocol. I have already managed to implement the tx capability and I was hoping to use gpio interrupts on the rx signal to determine the start condition, and</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Mon, 10 Aug 2026 18:25:56 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/128916/flpr-gpio-interrupts" /><item><title>RE: FLPR GPIO Interrupts</title><link>https://devzone.nordicsemi.com/thread/570076?ContentTypeID=1</link><pubDate>Mon, 10 Aug 2026 18:25:56 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:3b009a03-74f0-4b0e-9ff3-fad113daedd4</guid><dc:creator>Robert de Brum</dc:creator><description>&lt;p&gt;The pin in use is p1.05. When I am running, I know that the signal is toggling but I don&amp;#39;t see any&amp;nbsp;interrupts reaching my handler (in my _callback object).&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: FLPR GPIO Interrupts</title><link>https://devzone.nordicsemi.com/thread/570070?ContentTypeID=1</link><pubDate>Mon, 10 Aug 2026 13:58:19 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:97d22efb-dd05-4c09-bf0f-54da767deffc</guid><dc:creator>Hung Bui</dc:creator><description>&lt;p&gt;Hi Robert,&amp;nbsp;&lt;br /&gt;Please be aware that port P2 doesn&amp;#39;t generate interrupt regardless if it&amp;#39;s main app core or the FLPR core. See section 8.8.3 in the datasheet.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;&lt;img style="max-height:240px;max-width:320px;" src="https://devzone.nordicsemi.com/resized-image/__size/640x480/__key/communityserver-discussions-components-files/4/pastedimage1786370408583v1.png" alt=" " /&gt;&lt;br /&gt;&lt;br /&gt;So the link you referred to is only about&amp;nbsp;the GPIO pins that can be used as&amp;nbsp;VPR IO ( &lt;span&gt;&amp;nbsp;High-Performance Framework&amp;nbsp;&lt;/span&gt;)&amp;nbsp; . Not about pins that can be used with FLPR.&amp;nbsp;&lt;br /&gt;As far as I know FLPR should be able to access all pins.&amp;nbsp;&lt;br /&gt;&lt;br /&gt;Could you give more detail on which exact P1 pin that you tried to configure to get interrupt ?&amp;nbsp;&lt;br /&gt;What&amp;#39;s the result when you run the firmware on the FLPR ?&amp;nbsp;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>