Hi, we are designing a small battery-powered wearable and would like your view on the power sequence below before we commit the production schematic.
Parts
- nRF54L15-CAAA
- nPM1304-CAAA
- TDK T5838 PDM microphone, 1.62 to 1.98 V only
- BUCK1 strapped with 68 kOhm, so it starts at 2.0 V
- LOADSW1 fed from BUCK1, off at reset
Sequence
- BUCK1 starts at 2.0 V and powers the nRF54L15. LOADSW1 is off. All microphone-connected GPIOs are high-impedance.
- After boot, the nRF54L15 sets BUCK1 to 1.8 V over TWI and waits for the rail to settle.
- The nRF54L15 turns on LOADSW1, which powers the microphone from BUCK1.
- PDM CLK and DATA connect directly, since both devices now share one 1.8 V rail. Before LOADSW1 is turned off, firmware stops PDM and returns those pins to high-impedance.
Questions
- Can we simply run the nRF54L15 from BUCK1 strapped to 1.8 V? At the -5 % tolernace that is 1.71 V, above the 1.70 V operating minimum but below the 1.75 V VDD,POR figure. Is that acceptable for reliable power-on, and is 1.71 V with 50 mVpp hysteretic ripple acceptable while running? It seems the nRF54L15 DK is built this way.
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If not, we plan to strap BUCK1 to 2.0 V, boot, then lower it to 1.8 V over TWI while the nRF54L15 is running. Is a supply decrease while running supported, and are there constraints on ramp rate or radio activity during it?
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Which reset sources require VDD to reach 1.75 V again before the device restarts? We read the datasheet as: only power-on and brownout reset. Pin, soft, watchdog and wake-from-System-OFF resets restart at any VDD above 1.70 V. Is that correct? For the brownout case we intend the nPM1304 watchdog power cycle as the recovery path.
If this topology is not recommended, our fallback is nRF54L15 at 2.0 V, microphone on a 1.8 V LDO, and a fixed-direction dual-supply level translator. We would prefer the shared-rail approach if you consider the reset recovery and voltage margin production-safe.
Thanks!
