<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>nRF51 SPIM transfer</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/13966/nrf51-spim-transfer</link><description>Hi, 
 I wanted to know how the SPI rx_buffer is filled? Is it automatically filled when something is pushed to him by the SPI-slave and then goes to the spi_event_handler? Or is just filled when I do a nrf_drv_spi_transfer and don&amp;#39;t set the rx_buffer</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Thu, 19 May 2016 15:12:39 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/13966/nrf51-spim-transfer" /><item><title>RE: nRF51 SPIM transfer</title><link>https://devzone.nordicsemi.com/thread/53339?ContentTypeID=1</link><pubDate>Thu, 19 May 2016 15:12:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:9ea089bf-2cf1-47cf-9ce1-35a7da395048</guid><dc:creator>zhwzh308</dc:creator><description>&lt;p&gt;From my experience, the buffer is filled when you call &lt;code&gt;nrf_drv_spi_transfer&lt;/code&gt;. On the application side you can make two fixed size buffers for both tx and rx.&lt;/p&gt;
&lt;p&gt;When you call &lt;code&gt;nrf_drv_spi_transfer(&amp;amp;m_spi_m, tx_buffer, tx_bytes, rx_buffer, rx_bytes)&lt;/code&gt;, specify value for &lt;code&gt;tx_bytes&lt;/code&gt;, it is the number of bytes you want to put on the SPI master-out pin; &lt;code&gt;rx_bytes&lt;/code&gt; refers to the number of bytes you want to fill for the rx_buffer, beginning at the start of your transaction.&lt;/p&gt;
&lt;p&gt;For example, a register read on a SPI peripheral requires first writing the address of register you want to read, SPI peripheral will return the value of that register as soon as you finish writing the address. In this case &lt;code&gt;tx_bytes&lt;/code&gt; is 1, &lt;code&gt;rx_bytes&lt;/code&gt; is 2. When the call completes with call back, you will get the read from &lt;code&gt;rx_buffer[1]&lt;/code&gt;.&lt;/p&gt;
&lt;p&gt;In general, if you want to tx x bytes, and receive y bytes after x bytes has been transferred, &lt;code&gt;rx_buffer&lt;/code&gt; needs to be the size of (x + y). A valid read back value will start at rx_buffer[x] for the length of y.&lt;/p&gt;
&lt;p&gt;Back to your question, I think you can make a &lt;code&gt;rx_buffer&lt;/code&gt; large enough to contain the read back from SPI peripheral; write a call back function after the transaction is done and examine the value of &lt;code&gt;rx_buffer&lt;/code&gt;. Write a callback in the form of &lt;code&gt;typedef void (*nrf_drv_spi_handler_t)(nrf_drv_spi_evt_t const * p_event);&lt;/code&gt; and provide it when you call &lt;code&gt;nrf_drv_spi_init(&amp;amp;m_spi_m, &amp;amp;spi_config, spi_event_handler);&lt;/code&gt; to deal with the information you have received.&lt;/p&gt;
&lt;p&gt;Hope this helps!&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>