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<?xml-stylesheet type="text/xsl" href="https://devzone.nordicsemi.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Does the MPU limit code running in RAM?</title><link>https://devzone.nordicsemi.com/f/nordic-q-a/14334/does-the-mpu-limit-code-running-in-ram</link><description>Looking at Table 40 in the nRF51 Series Reference Manual v3.0, the Memory Protection Unit prevents request sources in Code R1 from writing to RAM R0. But if the request source is in RAM R1, it is allowed full read and write access to RAM R0. 
 On the</description><dc:language>en-US</dc:language><generator>Telligent Community 13</generator><lastBuildDate>Wed, 15 Jun 2016 18:58:07 GMT</lastBuildDate><atom:link rel="self" type="application/rss+xml" href="https://devzone.nordicsemi.com/f/nordic-q-a/14334/does-the-mpu-limit-code-running-in-ram" /><item><title>RE: Does the MPU limit code running in RAM?</title><link>https://devzone.nordicsemi.com/thread/54736?ContentTypeID=1</link><pubDate>Wed, 15 Jun 2016 18:58:07 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:70ba733e-a725-4e8d-bd9d-c9d3076ed036</guid><dc:creator>Branden Ghena</dc:creator><description>&lt;p&gt;It&amp;#39;s disappointing that the MPU cannot protect RAM0, but good to know. Thanks for clarifying this, Kristin.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Does the MPU limit code running in RAM?</title><link>https://devzone.nordicsemi.com/thread/54735?ContentTypeID=1</link><pubDate>Wed, 15 Jun 2016 12:54:48 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:a38b2029-f07c-4324-962c-fe3396b8aa78</guid><dc:creator>FormerMember</dc:creator><description>&lt;p&gt;It is only possible to protect code region 0. However, as the table shows, code region 1 will only have limited access to RAM 0. It means that for code in region 1 to have full access to RAM 0, the code in region1 has to be run from RAM.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Does the MPU limit code running in RAM?</title><link>https://devzone.nordicsemi.com/thread/54734?ContentTypeID=1</link><pubDate>Tue, 14 Jun 2016 23:47:14 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:e3f8161f-7c84-4e94-be35-3995776ad8ee</guid><dc:creator>RK</dc:creator><description>&lt;p&gt;I think the question is clear and I don&amp;#39;t know why the answers keep talking about Code Region protection when you&amp;#39;re asking about RAM region protection.&lt;/p&gt;
&lt;p&gt;As far as I can see RAM R0 is not protected from code running in RAM R1 so you can write RAM R0 as you suggest. However I&amp;#39;m not sure how much of a security hole that actually is, writing to RAM R0 doesn&amp;#39;t let you get any further.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Does the MPU limit code running in RAM?</title><link>https://devzone.nordicsemi.com/thread/54733?ContentTypeID=1</link><pubDate>Tue, 14 Jun 2016 16:32:59 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:00e53827-fb80-461e-bc6f-8e40b4a6e0ca</guid><dc:creator>Branden Ghena</dc:creator><description>&lt;p&gt;Thank you for clarifying. I think I have not explained my question well enough. I added an update to the original question with the parts I am confused about circled in red. Table 40 seems to show that RAM R0 is not protected from RAM R1.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Does the MPU limit code running in RAM?</title><link>https://devzone.nordicsemi.com/thread/54732?ContentTypeID=1</link><pubDate>Tue, 14 Jun 2016 11:38:28 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:d9f64a38-5429-48a3-8618-497f4084a042</guid><dc:creator>FormerMember</dc:creator><description>&lt;p&gt;I have updated my answer.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Does the MPU limit code running in RAM?</title><link>https://devzone.nordicsemi.com/thread/54731?ContentTypeID=1</link><pubDate>Mon, 13 Jun 2016 18:30:39 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:af2c705f-055c-4a7f-89d0-ce26ab6264bc</guid><dc:creator>Branden Ghena</dc:creator><description>&lt;p&gt;Thanks for the response, but it&amp;#39;s not quite the question I was asking. As you cited, the MPU protects Code R0 (in Flash) from accesses by Code R1 and RAM R1. But I&amp;#39;m interested in how it protects RAM R0.&lt;/p&gt;
&lt;p&gt;In Table 40 in the reference manual, it states that if the request source is RAM R0/R1 and the request target is RAM R0, Full Access is granted (regardless of MPU state). Does this mean that an access from RAM R1 can modify data in RAM R0 even if the MPU is on?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Does the MPU limit code running in RAM?</title><link>https://devzone.nordicsemi.com/thread/54730?ContentTypeID=1</link><pubDate>Mon, 13 Jun 2016 11:30:25 GMT</pubDate><guid isPermaLink="false">137ad170-7792-4731-bb38-c0d22fbe4515:f2245b82-d16e-4de2-a820-9e6f4e83eb2b</guid><dc:creator>FormerMember</dc:creator><description>&lt;p&gt;A memory protect region cannot be accessed by others, but it will have full access to the system.
The reference manual says the following regarding memory protection of region 0:&lt;/p&gt;
&lt;p&gt;&lt;em&gt;When memory protection
is enabled, these regions will be used by the Memory Protection Unit to enforce runtime protection and
readback protection of resources classified as region 0.&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;...&lt;/p&gt;
&lt;p&gt;&lt;em&gt;Independent of protection settings, code region R0 (CR0) will always have full access to the system.&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;...&lt;/p&gt;
&lt;p&gt;&lt;em&gt;When enabled, only
code running from code region 0 will be able to access the code in code region 0. Accesses generated by
code running from code region 1 or from RAM, as well as accesses generated by the debugger (SWD), will
not be granted when code region 0 is protected.
Independent of readback protection configuration of code&lt;/em&gt;&lt;/p&gt;
&lt;p&gt;Did this clearify how MPU work?&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;Update 14.06.16:&lt;/strong&gt;
The UICR register description show that 0x00 enables and 0xFF disables readback protection.
Therefore the &amp;quot;request source RAM R0/R1&amp;quot; with setting 0xFF disables readback protection, and hence, there will be full access to all request targets.&lt;/p&gt;
&lt;p&gt;When the  &amp;quot;request source RAM R0/R1&amp;quot; is set to 0x00 for readback protection on code region 0, there is no access to code region 0.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>